AD9834BRU-REEL

AD9834BRU-REEL Datasheet

20 mW Power, V to V, 75 MHz Complete DDS AD9834

Part	Datasheet
AD9834BRU-REEL	AD9834BRU-REEL (pdf)

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20 mW Power, V to V, 75 MHz Complete DDS AD9834 Narrow-band SFDR >72 dB V to V power supply Output frequency up to MHz Sine output/triangular output On-board comparator 3-wire interface Extended temperature range −40°C to +105°C Power-down option 20 mW power consumption at 3 V 20-lead TSSOP Capability for phase modulation and frequency modulation is provided. The frequency registers are 28 bits with a 75 MHz clock rate, resolution of Hz can be achieved. Similarly, with a 1 MHz clock rate, the AD9834 can be tuned to Hz resolution. Frequency and phase modulation are affected by loading registers through the serial interface and toggling the registers using software or the FSELECT pin and PSELECT pin, respectively. The AD9834 is written to using a 3-wire serial interface. This serial interface operates at clock rates up to 40 MHz and is compatible with DSP and microcontroller standards. Frequency stimulus/waveform generation Frequency phase tuning and modulation Low power RF/communications systems Liquid and gas flow measurement Sensory applications proximity, motion, and defect detection Test and medical equipment The device operates with a power supply from V to V. The analog and digital sections are independent and can be run from different power supplies, for example, AVDD can equal 5 V with DVDD equal to 3 V. The AD9834 has a power-down pin SLEEP that allows external control of the power-down mode. Sections of the device that are not being used can be powered down to minimize the current consumption. For example, the DAC can be powered down when a clock output is being generated. The AD9834 is a 75 MHz low power DDS device capable of producing high performance sine and triangular outputs. It also The part is available in a 20-lead TSSOP. has an on-board comparator that allows a square wave to be produced for clock generation. Consuming only 20 mW of power at 3 V makes the AD9834 an ideal candidate for power- sensitive applications. FUNCTIONAL BLOCK DIAGRAM AVDD AGND DGND DVDD CAP/2.5V REFOUT FS ADJUST MCLK FSELECT 28-BIT FREQ0 REG 28-BIT FREQ1 REG REGULATOR VCC 2.5V ON-BOARD REFERENCE PHASE ACCUMULATOR 28-BIT SIN ROM 12-BIT PHASE0 REG 12-BIT PHASE1 REG DIVIDED BY 2 FULL-SCALE CONTROL 10-BIT DAC COMP IOUT IOUTB 16-BIT CONTROL REGISTER SIGN BIT OUT SERIAL INTERFACE AND CONTROL LOGIC COMPARATOR AD9834 02705-001 Control Register 17 Frequency and Phase Registers 19 Writing to a Frequency 20 Writing to a Phase Register 20 RESET Function 20 SLEEP 20 Sign Bit Out 21 The IOUT and IOUTB 21 22 Grounding and Layout 25 Interfacing to 26 AD9834 to ADSP-21xx Interface 26 AD9834 to 68HC11/68L11 26 AD9834 to 80C51/80L51 Interface 27 AD9834 to DSP56002 Interface 27 Evaluation Board 28 Using the AD9834 Evaluation 28 Prototyping Area 28 XO vs. External 28 Power 28 Bill of 30 Outline Dimensions 31 Ordering Guide 31 Added Figure 10, Figures Renumbered Sequentially Added Figure 16 and Figure 17, Figures Renumbered Sequentially 10 Changes to Table 19 Changes to Writing a Frequency Register Section..................... 20 Changes to Figure 21 Changes to Table 19 30 Changes to Figure 28 0 Initial Version AD9834 SPECIFICATIONS VDD = V to V, AGND = DGND = 0 V, TA = TMIN to TMAX, RSET = kΩ, RLOAD = 200 Ω for IOUT and IOUTB, unless otherwise noted. Table Parameter2 SIGNAL DAC SPECIFICATIONS Resolution Update Rate IOUT Full Scale3 VOUT Max VOUT Min Output Compliance4 DC Accuracy Integral Nonlinearity Differential Nonlinearity DDS SPECIFICATIONS Dynamic Specifications Signal-to-Noise Ratio Total Harmonic Distortion Spurious-Free Dynamic Range SFDR Wideband 0 to Nyquist Narrow Band ±200 kHz B Grade C Grade Clock Feedthrough Wake-Up Time COMPARATOR Input Voltage Range Input Capacitance Input High-Pass Cutoff Frequency Input DC Resistance Input Leakage Current OUTPUT BUFFER Output Rise/Fall Time Output Jitter VOLTAGE REFERENCE Internal Reference REFOUT Output Impedance5 Reference TC LOGIC INPUTS VINH, Input High Voltage VINL, Input Low Voltage IINH/IINL, Input Current CIN, Input Capacitance POWER SUPPLIES AVDD DVDD IAA 6 Grade B, Grade C1 10 75 Unit Bits MSPS mA V mV V Test Conditions/Comments −66 −60 −78 −74 −50 1 10 4 5 12 120 fMCLK = 75 MHz, fOUT = fMCLK/4096 −56 fMCLK = 75 MHz, fOUT = fMCLK/4096 −56 fMCLK = 75 MHz, fOUT = fMCLK/75 −67 fMCLK = 50 MHz, fOUT = fMCLK/50 −65 fMCLK = 75 MHz, fOUT = fMCLK/75 V p-p AC-coupled internally ns ps rms Using a 15 pF load 3 MHz sine wave V p-p ppm/°C V to V power supply V to V power supply V to V power supply V to V power supply V to V power supply V to V power supply ORDERING GUIDE Model1 AD9834BRU-REEL AD9834BRUZ-REEL AD9834CRUZ EVAL-AD9834EBZ Maximum MCLK 50 MHz 50 MHz 50 MHz 50 MHz 50 MHz 50 MHz 75 MHz 75 MHz 75 MHz 1 Z = RoHS Compliant Part. Temperature Range −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C Package Description 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] Evaluation Board Package Option RU-20 RU-20 RU-20 RU-20 RU-20 RU-20 RU-20 RU-20 AD9834 NOTES Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02705-0-4/10 B

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20 mW Power, V to V, 75 MHz Complete DDS AD9834

Narrow-band SFDR >72 dB V to V power supply Output frequency up to MHz Sine output/triangular output On-board comparator 3-wire interface Extended temperature range −40°C to +105°C Power-down option 20 mW power consumption at 3 V 20-lead TSSOP

Capability for phase modulation and frequency modulation is provided. The frequency registers are 28 bits with a 75 MHz clock rate, resolution of Hz can be achieved. Similarly, with a 1 MHz clock rate, the AD9834 can be tuned to Hz resolution. Frequency and phase modulation are affected by loading registers through the serial interface and toggling the registers using software or the FSELECT pin and PSELECT pin, respectively.

The AD9834 is written to using a 3-wire serial interface. This serial interface operates at clock rates up to 40 MHz and is compatible with DSP and microcontroller standards.

Frequency stimulus/waveform generation Frequency phase tuning and modulation Low power RF/communications systems Liquid and gas flow measurement Sensory applications proximity, motion, and defect
detection Test and medical equipment

The device operates with a power supply from V to V. The analog and digital sections are independent and can be run from different power supplies, for example, AVDD can equal 5 V with DVDD equal to 3 V.

The AD9834 has a power-down pin SLEEP that allows external control of the power-down mode. Sections of the device that are not being used can be powered down to minimize the current consumption. For example, the DAC can be powered down when a clock output is being generated.

The AD9834 is a 75 MHz low power DDS device capable of producing high performance sine and triangular outputs. It also

The part is available in a 20-lead TSSOP.
has an on-board comparator that allows a square wave to be
produced for clock generation. Consuming only 20 mW of
power at 3 V makes the AD9834 an ideal candidate for power-
sensitive applications.

FUNCTIONAL BLOCK DIAGRAM

AVDD AGND DGND

DVDD CAP/2.5V

REFOUT FS ADJUST

MCLK

FSELECT
28-BIT FREQ0 REG
28-BIT FREQ1 REG

REGULATOR

VCC 2.5V

ON-BOARD REFERENCE

PHASE ACCUMULATOR
28-BIT

SIN ROM
12-BIT PHASE0 REG 12-BIT PHASE1 REG

DIVIDED BY 2

FULL-SCALE CONTROL
10-BIT DAC

COMP

IOUT IOUTB
16-BIT CONTROL REGISTER

SIGN BIT OUT

SERIAL INTERFACE AND

CONTROL LOGIC

COMPARATOR

AD9834
02705-001
Control Register 17 Frequency and Phase Registers 19 Writing to a Frequency 20 Writing to a Phase Register 20 RESET Function 20 SLEEP 20 Sign Bit Out 21 The IOUT and IOUTB 21 22 Grounding and Layout 25 Interfacing to 26 AD9834 to ADSP-21xx Interface 26 AD9834 to 68HC11/68L11 26 AD9834 to 80C51/80L51 Interface 27 AD9834 to DSP56002 Interface 27 Evaluation Board 28 Using the AD9834 Evaluation 28 Prototyping Area 28 XO vs. External 28 Power 28 Bill of 30 Outline Dimensions 31 Ordering Guide 31

Added Figure 10, Figures Renumbered Sequentially Added Figure 16 and Figure 17, Figures Renumbered Sequentially 10 Changes to Table 19 Changes to Writing a Frequency Register Section..................... 20 Changes to Figure 21 Changes to Table 19 30 Changes to Figure 28
0 Initial Version

AD9834

SPECIFICATIONS

VDD = V to V, AGND = DGND = 0 V, TA = TMIN to TMAX, RSET = kΩ, RLOAD = 200 Ω for IOUT and IOUTB, unless otherwise noted.

Table

Parameter2 SIGNAL DAC SPECIFICATIONS

Resolution Update Rate IOUT Full Scale3 VOUT Max VOUT Min Output Compliance4 DC Accuracy

Integral Nonlinearity Differential Nonlinearity DDS SPECIFICATIONS Dynamic Specifications Signal-to-Noise Ratio Total Harmonic Distortion Spurious-Free Dynamic Range SFDR Wideband 0 to Nyquist Narrow Band ±200 kHz B Grade C Grade Clock Feedthrough Wake-Up Time COMPARATOR Input Voltage Range Input Capacitance Input High-Pass Cutoff Frequency Input DC Resistance Input Leakage Current OUTPUT BUFFER Output Rise/Fall Time Output Jitter VOLTAGE REFERENCE Internal Reference REFOUT Output Impedance5 Reference TC LOGIC INPUTS VINH, Input High Voltage

VINL, Input Low Voltage

IINH/IINL, Input Current CIN, Input Capacitance POWER SUPPLIES AVDD DVDD IAA 6

Grade B, Grade C1
10 75

Unit

Bits MSPS mA V mV V

Test Conditions/Comments
−66
−60
−78 −74 −50 1
10 4 5
12 120
fMCLK = 75 MHz, fOUT = fMCLK/4096
−56
fMCLK = 75 MHz, fOUT = fMCLK/4096
−56
fMCLK = 75 MHz, fOUT = fMCLK/75
−67
fMCLK = 50 MHz, fOUT = fMCLK/50
−65
fMCLK = 75 MHz, fOUT = fMCLK/75

V p-p AC-coupled internally
ns ps rms

Using a 15 pF load 3 MHz sine wave V p-p
ppm/°C

V to V power supply

V to V power supply

V to V power supply

V to V power supply

V to V power supply

V to V power supply
ORDERING GUIDE

Model1 AD9834BRU-REEL AD9834BRUZ-REEL AD9834CRUZ EVAL-AD9834EBZ

Maximum MCLK 50 MHz 50 MHz 50 MHz 50 MHz 50 MHz 50 MHz 75 MHz 75 MHz 75 MHz
1 Z = RoHS Compliant Part.

Temperature Range −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C

Package Description 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] 20-Lead Thin Shrink Small Outline Package [TSSOP] Evaluation Board

Package Option RU-20 RU-20 RU-20 RU-20 RU-20 RU-20 RU-20 RU-20

AD9834 NOTES

Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.

D02705-0-4/10 B

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Datasheet ID: AD9834BRU-REEL 517792