AD9249-65EBZ

AD9249-65EBZ Datasheet

EVALUATING THE AD9249 ANALOG-TO-DIGITAL CONVERTER

Part	Datasheet
AD9249-65EBZ	AD9249-65EBZ (pdf)

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One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106 • Tel • Fax • EVALUATING THE AD9249 ANALOG-TO-DIGITAL CONVERTER This user guide describes the AD9249 evaluation board AD9249-65EBZ, which provides the support circuitry required to operate the ADC in its various modes and configurations. The application software used to interface with the device is also described. The AD9249 data sheet provides additional information and should be consulted when using the evaluation board. All documents and software tools are available at For additional information or questions, send an email to Typical Measurement Setup Figure Evaluation Board on Left and HSC-ADC-EVALDZ on Right q SPI interface for setup and control q External, on-board oscillator q On-board LDO regulator or switching regulator, needing a single external 6V, 2A dc supply q ADC VREF configurable for ADC-internal reference, on-board reference, off-board reference q and SPIController software interfaces Helpful Documents q AD9249 data sheet q High speed ADC FIFO evaluation kit HSC-ADC-EVALDZ q HSC-ADC-EVALDZ Wiki Guide q AN-905 Application Note, VisualAnalog Converter Evaluation Tool Version User Manual q AN-878 Application Note, High Speed ADC SPI Control Software q AN-877 Application Note, Interfacing to High Speed ADCs via SPI q AN-835 Application Note, Understanding ADC Testing and Evaluation Design and Integration Files q Schematics, layout files, bill of materials <Coming Soon> Equipment Needed q Analog signal source s and antialiasing filter s q Sample clock source if not using the on-board crystal oscillator q Switching power supply 6.0V, 2.5A for AD9249-65EBZ q Switching power supply 12V, 3,3A for HSC-ADC-EVALDZ q PC running q USB port q AD9249-65EBZ board q HSC-ADC-EVALDZ FPGA-based data capture kit Getting Started This section provides quick start procedures for using the AD9249-65EBZ board. Both the default and optional ADC settings are described. Configuring the Board Before using the software for testing, configure the evaluation board as follows Connect the evaluation board to the data capture board, as shown in Figure On the ADC evaluation board, confirm that the jumpers are installed as shown in Figure Connect one 6V, 2.5A switching power supply such as the CUI, Inc., EPS060250UH-PHP-SZ that is supplied to the AD9249-65EBZ. Connect the 12V, 3.3A switching power supply to the HSC-ADC-EVALDZ board. Connect the HSC-ADC-EVALDZ board P702 to the PC using a USB cable. On the ADC evaluation board, use a clean signal generator with low phase noise to provide an input signal to the desired channel s . Use a shielded, RG-58, 50Ω coaxial cable optimally 1 m or shorter to connect the signal generator. For best results, use a narrow-band, band-pass filter with 50Ω terminations and an appropriate center frequency. Analog Devices, Inc. uses TTE, Allen Avionics, and K&L band-pass filters. Evaluation Board Hardware The evaluation board provides the support circuitry required to operate the AD9249 in its various modes and configurations. Figure 1 shows the typical bench characterization setup used to evaluate AC performance. It is critical that the signal sources used for the analog input and clock have very low phase noise ideally ~100 fs rms jitter to realize the optimum performance of the signal chain. Proper filtering of the analog input signal to remove harmonics and lower the integrated or broadband noise at the input is necessary to achieve the specified noise performance. See AD9249 Design Support <Coming Soon> for the complete schematics and layout diagrams. These diagrams demonstrate the routing and grounding techniques that should be applied at the system level when designing application boards using these converters. Power Supplies This evaluation board comes with a wall-mountable switching power supply that provides a 6V, 2A maximum output. Connect the supply to a 100V ac to 240V ac, 47Hz to 63Hz wall outlet. The output from the supply is provided through a 2.1mm inner diameter jack that connects to the printed circuit board PCB at P101. The 6V supply is fused and conditioned on the PCB before connecting to the low dropout linear regulators that supply the proper bias to each of the various sections on the board. The evaluation board can be powered in a nondefault condition using external bench power supplies. To do this, remove the E102, E103, E110, and E113 ferrite beads to disconnect the on-board LDOs from the power planes. Note that in some board configurations some of these might already be uninstalled. P102 and P103 headers can be installed to facilitate connection of external bench supplies to the board. E106, E107, E108 and E109 need to be populated to connect P102 and P103 to the board power domains. A 1.8V , 0.5A supply is needed for both 1.8V_DUT_AVDD and 1.8V_DRVDD. Although the voltage requirements are the same for 1.8V_DUT_AVDD and 1.8V_DRVDD, it is recommended that separate supplies be used for each of these. Two additional supplies, 3.3V_CLK and 1.8V_DVDD, are used to power additional on board circuitry. If used, these supplies should each have at least 0.5A current capability. Input Signals When connecting the ADC clock and analog source, use clean signal generators with low phase noise, such as the Rohde & Schwarz SMA, or an equivalent. Use a shielded, RG-58, 50Ω coaxial cable optimally 1 m or shorter for connecting to the evaluation board. Enter the desired frequency and amplitude see the Specifications section in the data sheet . When connecting the analog input source, use of a multipole, narrow-band-pass filter with 50Ω terminations is recommended. Analog Devices uses band-pass filters from TTE and K&L Microwave, Inc. Connect the filters as close to the evaluation board as possible. If an external clock source is used instead of the onboard crystal oscillator, it should also be supplied with a clean signal generator as previously specified for the analog input signals. Analog Devices evaluation boards typically can accept ~2.8V p-p or 13 dBm sine wave input for the clock at the board SMA clock connector. If an external off-board clock source is used, remove the jumper on J804, and C810, to disable and disconnect the on-board crystal oscillator. Output Signals The default setup uses the Analog Devices high speed converter evaluation platform HSC-ADC-EVALDZ for data capture. The serial LVDS outputs from the ADC are routed to J1 and J2 using 100Ω differential traces. For more information on the data capture board and its optional settings, visit Jumper Settings Set the jumper settings/link options on the evaluation board for the required operating modes before powering on the board. The functions of the jumpers are described in Table Figure 2 shows the default jumper settings. Table Jumper Settings Jumper Description J204 Use this jumper to power down the ADC. Using the SPI, the PDWN pin can be configured to invoke the STBY standby function instead of power down. This jumper sets the ADC for SPI communications with the HSC-ADC-EVALDZ. Connect Pin 1 to Pin 2 for SDIO, Pin 4 to Pin 5 for SCLK, Pin 8 to Pin 9 for CSB1 and Pin 11 to Pin 12 for CSB2. J804

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One Technology Way
• P.O. Box 9106
• Norwood, MA 02062-9106
• Tel
• Fax
•

EVALUATING THE AD9249 ANALOG-TO-DIGITAL CONVERTER

This user guide describes the AD9249 evaluation board AD9249-65EBZ, which provides the support circuitry required to operate the ADC in its various modes and configurations. The application software used to interface with the device is also described. The AD9249 data sheet provides additional information and should be consulted when using the evaluation board. All documents and software tools are available at For additional information or questions, send an email to

Typical Measurement Setup

Figure Evaluation Board on Left and HSC-ADC-EVALDZ on Right
q SPI interface for setup and control q External, on-board oscillator q On-board LDO regulator or switching regulator, needing a single external 6V, 2A dc supply q ADC VREF configurable for ADC-internal reference, on-board reference, off-board reference q and SPIController software interfaces

Helpful Documents
q AD9249 data sheet q High speed ADC FIFO evaluation kit HSC-ADC-EVALDZ q HSC-ADC-EVALDZ Wiki Guide q AN-905 Application Note, VisualAnalog Converter Evaluation Tool Version User Manual q AN-878 Application Note, High Speed ADC SPI Control Software q AN-877 Application Note, Interfacing to High Speed ADCs via SPI q AN-835 Application Note, Understanding ADC Testing and Evaluation

Design and Integration Files
q Schematics, layout files, bill of materials <Coming Soon>

Equipment Needed
q Analog signal source s and antialiasing filter s q Sample clock source if not using the on-board crystal oscillator q Switching power supply 6.0V, 2.5A for AD9249-65EBZ q Switching power supply 12V, 3,3A for HSC-ADC-EVALDZ q PC running q USB port q AD9249-65EBZ board q HSC-ADC-EVALDZ FPGA-based data capture kit

Getting Started

This section provides quick start procedures for using the AD9249-65EBZ board. Both the default and optional ADC settings are described.

Configuring the Board

Before using the software for testing, configure the evaluation board as follows Connect the evaluation board to the data capture board, as shown in Figure On the ADC evaluation board, confirm that the jumpers are installed as shown in Figure Connect one 6V, 2.5A switching power supply such as the CUI, Inc., EPS060250UH-PHP-SZ that is
supplied to the AD9249-65EBZ. Connect the 12V, 3.3A switching power supply to the HSC-ADC-EVALDZ board. Connect the HSC-ADC-EVALDZ board P702 to the PC using a USB cable. On the ADC evaluation board, use a clean signal generator with low phase noise to provide an
input signal to the desired channel s . Use a shielded, RG-58, 50Ω coaxial cable optimally 1 m or shorter to connect the signal generator. For best results, use a narrow-band, band-pass filter with 50Ω terminations and an appropriate center frequency. Analog Devices, Inc. uses TTE, Allen Avionics, and K&L band-pass filters.

Evaluation Board Hardware

The evaluation board provides the support circuitry required to operate the AD9249 in its various modes and configurations. Figure 1 shows the typical bench characterization setup used to evaluate AC performance. It is critical that the signal sources used for the analog input and clock have very low phase noise ideally ~100 fs rms jitter to realize the optimum performance of the signal chain. Proper filtering of the analog input signal to remove harmonics and lower the integrated or broadband noise at the input is necessary to achieve the specified noise performance.

See AD9249 Design Support <Coming Soon> for the complete schematics and layout diagrams. These diagrams demonstrate the routing and grounding techniques that should be applied at the system level when designing application boards using these converters.

Power Supplies

This evaluation board comes with a wall-mountable switching power supply that provides a 6V, 2A maximum output. Connect the supply to a 100V ac to 240V ac, 47Hz to 63Hz wall outlet. The output from the supply is provided through a 2.1mm inner diameter jack that connects to the printed circuit board PCB at P101. The 6V supply is fused and conditioned on the PCB before connecting to the low dropout linear regulators that supply the proper bias to each of the various sections on the board.

The evaluation board can be powered in a nondefault condition using external bench power supplies. To do this, remove the E102, E103, E110, and E113 ferrite beads to disconnect the on-board LDOs from the power planes. Note that in some board configurations some of these might already be uninstalled. P102 and P103 headers can be installed to facilitate connection of external bench supplies to the board. E106, E107, E108 and E109 need to be populated to connect P102 and P103 to the board power domains. A 1.8V , 0.5A supply is needed for both 1.8V_DUT_AVDD and 1.8V_DRVDD. Although the voltage requirements are the same for 1.8V_DUT_AVDD and 1.8V_DRVDD, it is recommended that separate supplies be used for each of these.

Two additional supplies, 3.3V_CLK and 1.8V_DVDD, are used to power additional on board circuitry. If used, these supplies should each have at least 0.5A current capability.

Input Signals

When connecting the ADC clock and analog source, use clean signal generators with low phase noise, such as the Rohde & Schwarz SMA, or an equivalent. Use a shielded, RG-58, 50Ω coaxial cable optimally 1 m or shorter for connecting to the evaluation board. Enter the desired frequency and amplitude see the Specifications section in the data sheet . When connecting the analog input source, use of a multipole, narrow-band-pass filter with 50Ω terminations is recommended. Analog Devices uses band-pass filters from TTE and K&L Microwave, Inc. Connect the filters as close to the evaluation board as possible.

If an external clock source is used instead of the onboard crystal oscillator, it should also be supplied with a clean signal generator as previously specified for the analog input signals. Analog Devices evaluation boards typically can accept ~2.8V p-p or 13 dBm sine wave input for the clock at the board SMA clock connector. If an external off-board clock source is used, remove the jumper on J804, and

C810, to disable and disconnect the on-board crystal oscillator.

Output Signals

The default setup uses the Analog Devices high speed converter evaluation platform HSC-ADC-EVALDZ for data capture. The serial LVDS outputs from the ADC are routed to J1 and J2 using 100Ω differential traces. For more information on the data capture board and its optional settings, visit

Jumper Settings

Set the jumper settings/link options on the evaluation board for the required operating modes before powering on the board. The functions of the jumpers are described in Table Figure 2 shows the default jumper settings.

Table Jumper Settings

Jumper Description

J204

Use this jumper to power down the ADC. Using the SPI, the PDWN pin can be configured to invoke the STBY standby function instead of power down.

This jumper sets the ADC for SPI communications with the HSC-ADC-EVALDZ.

Connect Pin 1 to Pin 2 for SDIO, Pin 4 to Pin 5 for SCLK, Pin 8 to Pin 9 for CSB1 and Pin 11 to

Pin 12 for CSB2.

J804

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Datasheet ID: AD9249-65EBZ 517769