TS68882VR16
TS68882VR16 Datasheet
The TS68882 enhanced floating-point co-processor is a full implementation of the IEEE Standard for Binary Floating-Point Arithmetic 754 for use with the THOMSON TS68000 Family of microprocessors. It is a pin and software compatible upgrade of the TS68881 with optimized MPU interface that provides over times the performance of the TS68881. It is implemented using VLSI technology to give systems designers the highest possible functionality in a physically small device.
| Part | Datasheet |
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TS68882VR16 |
TS68882VR16 (pdf) |
| Related Parts | Information |
|---|---|
TS68882VF20 |
TS68882VF20 |
TS68882VF16 |
TS68882VF16 |
TS68882VR25 |
TS68882VR25 |
TS68882VF1-20 |
TS68882VF1-20 |
TS68882VR1-20 |
TS68882VR1-20 |
TS68882VR1-25 |
TS68882VR1-25 |
TS68882VF25 |
TS68882VF25 |
TS68882VR20 |
TS68882VR20 |
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| • Eight General-purpose Floating-point Data Registers, Each Supporting a Full 80-bit Extended Precision Real Data Format a 64-bit Mantissa Plus a Sign Bit, and a 15-bit Signed Exponent • A 67-bit Arithmetic Unit to Allow Very Fast Calculations with Intermediate are Precision Greater than the Extended Precision Format • A 67-bit Barrel Shifter for High-speed Shifting Operations for Normalizing etc. • Special-purpose Hardware for High-speed Conversion Between Single, Double, and Extended Formats and the Internal Extended Format • An Independent State Machine to Control Main Processor Communication for Pipelined Instruction Processing • Forty-six Instructions, Including 35 Arithmetic Operations • Full Conformation to the IEEE 754 Standard, Including All Requirements and Suggestions • Support of Functions Not Defined by the IEEE Standard, Including a Full Set of Trigonometric and Transcendental Functions • Seven Data Type Types Byte, Word and Long Integers Single, Double, and Extended Precision Real Numbers and Packed Binary Coded Decimal String Real Numbers • Twenty-two Constants Available In The On-chip ROM, Including e, and Powers of 10 • Virtual Memory/Machine Operations • Efficient Mechanisms for Procedure Calls, Context Switches, and Interrupt Handling • Fully Concurrent Instruction Execution with the Main Processor • Fully Concurrent Instruction Execution of Multiple Floating-point Instructions • Use with any Host Processor, on an 8-, 16- or 32-bit Data Bus • Available in 20, 25 and 33 MHz for Tc from -55°C to +125°C • VCC = 5V ± 10% The TS68882 enhanced floating-point co-processor is a full implementation of the IEEE Standard for Binary Floating-Point Arithmetic 754 for use with the THOMSON TS68000 Family of microprocessors. It is a pin and software compatible upgrade of the TS68881 with optimized MPU interface that provides over times the performance of the TS68881. It is implemented using VLSI technology to give systems designers the highest possible functionality in a physically small device. Intended primarily for use as a co-processor to the TS68020/68030 32-bit microprocessor units MPUs , the TS68882 provides a logical extension to the main MPU integer data processing capabilities. It does this by providing a very high performance floating-point arithmetic unit and a set of floating-point data registers that are utilized in a manner that is analogous to the use of the integer data registers. The TS68882 instruction set is a natural extension of all earlier members of the TS68000 Family, and supports all of the addressing modes of the host MPU. Due to the flexible bus interface of the TS68000 Family, the TS68882 can be used with any of the MPU devices of the TS68000 Family, and it may also be used as a peripheral to non-TS68000 processors. Screening/Quality This product could be manufactured in full compliance with either • MIL-STD-883 Class B • DESC 5962-89436 • or According to ATMEL- Grenoble Standards R suffix PGA 68 Ceramic Pin Grid Array F suffix CQFP 68 Ceramic Quad Flat Pack CMOS Enhanced Floating-point Co-processor TS68882 Introduction The TS68882 is a high-performance floating-point device designed to interface with the TS68020 or TS68030 as a co-processor. This device fully supports the TS68000 virtual machine architecture, and is implemented in HCMOS, Atmel’s low power, small geometry process. This process allows CMOS and HMOS high-density NMOS gates to be combined on the same device. CMOS structures are used where speed and low power is required, and HMOS structures are used where minimum silicon area is desired. The HCMOS technology enables the TS68882 to be very fast while consuming less power than comparable HMOS, and still have a reasonably small die size. With some performance degradation, the TS68882 can also be used as a peripheral processor in systems where the TS68020 or TS68030 is not the main processor i.e., TS68000, TS68010 . The configuration of the TS68882 as a peripheral processor or coprocessor may be completely transparent to user software i.e., the same object code may be executed in either configuration . The architecture of the TS68882 appears to the user as a logical extension of the TS68000 Family architecture. Coupling of the co-processor interface allows the TS68020/TS68030 programmer to view the TS68882 registers as though the registers are resident in the TS68020/TS68030. Thus, a TS68020 or TS68030/TS68882 device pair appears to be one processor that supports seven floating-point and integer data types, and has eight integer data registers, eight address registers, and eight floatingpoint data registers. As shown in Figure 1, the TS68882 is internally divided into four processing elements the Bus Interface Unit BIU , the Conversion Control Unit CCU , the Execution Control Unit ECU , and the Microcode Control Unit MCU . The BIU communicates with the main processor, the CCU controls the main processor communications dialog and performs some data conversions, and the ECU and MCU execute most floating-point calculations. The BIU contains the co-processor interface registers, and the 32-bit control, and instruction address registers. In addition to these registers, the register select and DSACK timing control logic is contained in the BIU. Finally, the status flags used to monitor the status of communications with the main processor are contained in the BIU. The CCU contains special-purpose hardware that performs conversions between the single, double, and extended precision memory data formula and the internal data format used by the ECU. It also contains a state machine that controls communications with the main processor during co-processor interface dialogs. The eight 80-bit floating-point data registers FP0-FP7 are located in the ECU. In addition to these registers, the ECU contains a high-speed 67-bit arithmetic unit used for both mantissa and exponent calculations, a barrel shifter that can shift from 1-bit to 67bits in one machine cycle, and ROM constants for use by the internal algorithms or user programs . The MCU contains the clock generator, a two-level microcoded sequencer that controls the ECU, the microcode ROM, and self-test circuitry. The built-in self-test capabilities of the TS68882 enhance reliability and ease manufacturing requirements however, these diagnostic functions are not available to the user. 2 TS68882 Figure TS68882 Simplified Block TS68882 Pin Assignments Figure PGA Terminal Designation * Reserved for future ATMEL-Grenoble use 4 TS68882 Figure 2b. CQFP Terminal Designation TS68882 Functional Signal Descriptions This section contains a brief description of the input and output signals for the TS68882 floating-point co-processor. The signals are functionally organized into groups as shown in Figure Figure TS68882 Input/output Signals Note: The terms assertion and negation are used extensively. This is done to avoid confusion when describing “active-low” and “active-high” signals. The term assert or assertion is used to indicate that a signal is active or true, independent of whether that level is represented by a high or low voltage. The term negate or negation is used to indicate that a signal is inactive or false. Signal Summary Table 1 provides a summary of all the TS68882 signals described in this section. Ordering Information HI-REL Product Commercial Atmel Part-Number TS68882MRB/C16 TS68882MRB/C20 TS68882MRB/C25 TS68882MRB/C33 TS68882MFB/C16 TS68882MFB/C20 TS68882MFB/C25 TS68882DESC01XA TS68882DESC02XA TS68882DESC03XA TS68882DESC04XA TS68882DESC01YA TS68882DESC02YA TS68882DESC03YA TS68882DESC04YA Norms MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883 DESC Package PGA 68 PGA 68 PGA 68 PGA 68 CQFP 68 CQFP 68 CQFP 68 PGA 68 PGA 68 PGA 68 PGA 68 CQFP 68 CQFP 68 CQFP 68 CQFP 68 Temperature Range Tc °C -55 / +125 -55 / +125 -55 / +125 -55 / +125 -55 / +125 -55 / +125 -55 / +125 -55 / +125 -55 / +125 -55 / +125 -55 / +125 -55 / +125 -55 / +125 -55 / +125 -55 / +125 Frequency MHz 20 25 33 20 25 20 25 33 20 25 33 Drawing Number - 5962 8946301XA 5962 8946301XA 5962 8946301XA 5962 8946301XA 5962 8946301XA 5962 8946301XA 5962 8946301XA 5962 8946304YA Standard Product Commercial Atmel Part-Number Norms TS68882VR16 ATMEL-Grenoble Standard TS68882VR20 ATMEL-Grenoble Standard TS68882VR25 ATMEL-Grenoble Standard TS68882VR33 ATMEL-Grenoble Standard TS68882MR16 ATMEL-Grenoble Standard TS68882MR20 ATMEL-Grenoble Standard TS68882MR25 ATMEL-Grenoble Standard TS68882MR33 ATMEL-Grenoble Standard TS68882VF16 ATMEL-Grenoble Standard TS68882VF20 ATMEL-Grenoble Standard TS68882VF25 ATMEL-Grenoble Standard TS68882VF33 ATMEL-Grenoble Standard TS68882MF16 ATMEL-Grenoble Standard Package PGA 68 PGA 68 PGA 68 PGA 68 PGA 68 PGA 68 PGA 68 PGA 68 CQFP 68 CQFP 68 CQFP 68 CQFP 68 CQFP 68 |
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