AD61009ARSRL

AD61009ARSRL Datasheet

AD61009

Part	Datasheet
AD61009ARSRL	AD61009ARSRL (pdf)

PDF Datasheet Preview
FEATURES Complete Receiver-on-a-Chip Mixer dBm 1 dB Compression Point dBm Input Third Order Intercept 500 MHz RF and LO Bandwidths Linear IF Amplifier Linear-in-dB Gain Control Manual Gain Control Quadrature Demodulator On-Board Phase-Locked Quadrature Oscillator Demodulates IFs from 1 MHz to 12 MHz Can Also Demodulate AM, CW, SSB Low Power 25 mW at 3 V CMOS Compatible Power-Down APPLICATIONS GSM and TETRA Receivers Satellite Terminals Battery-Powered Communications Receivers Low Power Mixer 3 V Receiver IF Subsystem AD61009 PIN CONFIGURATION 20-Lead SSOP RS Suffix FDIN 1 20 VPS1 COM1 2 19 FLTR PRUP 3 18 IOUT LOIP 4 17 QOUT RFLO 5 AD61009 16 VPS2 RFHI TOP VIEW Not to Scale DMIP GREF 7 14 IFOP MXOP 8 13 COM2 VMID 9 12 GAIN IFHI 10 11 IFLO GENERAL DESCRIPTION The AD61009 is a 3 V low power receiver IF subsystem for operation at input frequencies as high as 500 MHz and IFs from 400 kHz to 12 MHz. It consists of a mixer, IF amplifiers, I and Q demodulators, a phase-locked quadrature oscillator, and a biasing system with external power-down. The AD61009’s low noise, high intercept mixer is a doublybalanced Gilbert cell type. It has a nominal dBm input referred 1 dB compression point and a dBm input referred third-order intercept. The mixer section of the AD61009 also includes a local oscillator LO preamplifier, which lowers the required LO drive to dBm. In MGC operation, the AD61009 accepts an external gaincontrol voltage input from an external AGC detector or a DAC. A quadrature VCO phase-locked to the IF drives the I and Q demodulators. The I and Q demodulators can also demodulate AM when the AD61009’s quadrature VCO is phase locked to the received signal, the in-phase demodulator becomes a synchronous product detector for AM. The VCO can also be phase-locked to an external beat-frequency oscillator BFO , and the demodulator serves as a product detector for CW or SSB reception. Finally, the AD61009 can be used to demodulate BPSK using an external Costas Loop for carrier recovery. Monoceiver is a registered trademark of Analog Devices, Inc. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel 781/329-4700 World Wide Web Site: Fax 781/326-8703 Analog Devices, Inc., 2001 TA = Supply = V, IF = MHz, unless otherwise noted Model DYNAMIC PERFORMANCE MIXER Maximum RF and LO Frequency Range Maximum Mixer Input Voltage Input 1 dB Compression Point Input Third-Order Intercept Noise Figure ORDERING GUIDE Temperature Range to +85°C for V to V Operation to +85°C for V to V Operation Package Description 20-Lead Plastic SSOP Package Option RS-20 AD61009 Pin Mnemonic 1 FDIN 2 COM1 3 PRUP 4 LOIP 5 RFLO 6 RFHI 7 GREF 8 MXOP 9 VMID 10 IFHI 11 IFLO 12 GAIN 13 COM2 14 IFOP 15 DMIP 16 VPS2 17 QOUT 18 IOUT 19 FLTR 20 VPS1 PIN FUNCTION DESCRIPTIONS Reads Frequency Detector Input Common #1 Power-Up Input Local Oscillator Input RF “Low” Input RF “High” Input Gain Reference Input Mixer Output Midsupply Bias Voltage IF “High” Input IF “Low” Voltage Gain Control Input Common #2 IF Output Demodulator Input VPOS Supply #2 Quadrature Output In-Phase Output PLL Loop Filter VPOS Supply #1 Function PLL input for I/Q demodulator quadrature oscillator, ± 400 mV drive required from external oscillator. Must be biased at VP/2. Supply common for RF front end and main bias. 3 V/5 V CMOS compatible power-up control logical high = powered-up max input level = VPS1 = VPS2. LO input, ac coupled ± 54 mV LO input required dBm for 50 input termination . Usually connected to ac ground. AC coupled, ± 56 mV, max RF input for linear operation. High impedance input, typically V, sets gain scaling. High impedance, single-sided current output, ± V max voltage output ± 6 mA max current output . Output of the midsupply bias generator VMID = VPOS/2 . AC coupled IF input, ± 56 mV max input for linear operation. Reference node for IF input auto-offset null. High impedance input, 0 V using 3 V supply, max gain at V = Supply common for IF stages and demodulator. Low impedance, single-sided voltage output, 5 dBm ± 560 mV max. Signal input to I and Q demodulators ± 150 mV max input at IF > 3 MHz for linear operation ± 75 mV max input at IF < 3 MHz for linear operation. Must be biased at VP/2. Supply to high-level IF, PLL, and demodulators. Low impedance Q baseband output ± V full scale in 20 min load ac coupled. Low impedance I baseband output ± V full scale in 20 min load ac coupled. Series RC PLL Loop filter, connected to ground. Supply to mixer, low level IF, PLL, and gain control. PIN CONNECTION 20-Lead SSOP RS-20 FDIN 1 20 VPS1 COM1 2 19 FLTR PRUP 3 18 IOUT

PDF Datasheet Preview

FEATURES Complete Receiver-on-a-Chip Mixer
dBm 1 dB Compression Point dBm Input Third Order Intercept 500 MHz RF and LO Bandwidths Linear IF Amplifier Linear-in-dB Gain Control Manual Gain Control Quadrature Demodulator On-Board Phase-Locked Quadrature Oscillator Demodulates IFs from 1 MHz to 12 MHz Can Also Demodulate AM, CW, SSB Low Power 25 mW at 3 V CMOS Compatible Power-Down

APPLICATIONS GSM and TETRA Receivers Satellite Terminals Battery-Powered Communications Receivers

Low Power Mixer 3 V Receiver IF Subsystem

AD61009

PIN CONFIGURATION
20-Lead SSOP RS Suffix

FDIN 1
20 VPS1

COM1 2
19 FLTR

PRUP 3
18 IOUT

LOIP 4
17 QOUT

RFLO 5 AD61009 16 VPS2

RFHI

TOP VIEW Not to Scale

DMIP

GREF 7
14 IFOP

MXOP 8
13 COM2

VMID 9
12 GAIN

IFHI 10
11 IFLO

GENERAL DESCRIPTION The AD61009 is a 3 V low power receiver IF subsystem for operation at input frequencies as high as 500 MHz and IFs from 400 kHz to 12 MHz. It consists of a mixer, IF amplifiers, I and Q demodulators, a phase-locked quadrature oscillator, and a biasing system with external power-down.

The AD61009’s low noise, high intercept mixer is a doublybalanced Gilbert cell type. It has a nominal dBm input referred 1 dB compression point and a dBm input referred third-order intercept. The mixer section of the AD61009 also includes a local oscillator LO preamplifier, which lowers the required LO drive to dBm.

In MGC operation, the AD61009 accepts an external gaincontrol voltage input from an external AGC detector or a DAC.

A quadrature VCO phase-locked to the IF drives the I and Q demodulators. The I and Q demodulators can also demodulate AM when the AD61009’s quadrature VCO is phase locked to the received signal, the in-phase demodulator becomes a synchronous product detector for AM. The VCO can also be phase-locked to an external beat-frequency oscillator BFO , and the demodulator serves as a product detector for CW or SSB reception. Finally, the AD61009 can be used to demodulate BPSK using an external Costas Loop for carrier recovery.

Monoceiver is a registered trademark of Analog Devices, Inc.

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel 781/329-4700 World Wide Web Site:

Fax 781/326-8703

Analog Devices, Inc., 2001

TA = Supply = V, IF = MHz, unless otherwise noted

Model

DYNAMIC PERFORMANCE

MIXER Maximum RF and LO Frequency Range Maximum Mixer Input Voltage Input 1 dB Compression Point Input Third-Order Intercept Noise Figure
ORDERING GUIDE

Temperature Range
to +85°C for V to V Operation to +85°C for V to V Operation

Package Description 20-Lead Plastic SSOP

Package Option RS-20

AD61009

Pin Mnemonic 1 FDIN
2 COM1 3 PRUP
4 LOIP
5 RFLO 6 RFHI 7 GREF 8 MXOP
9 VMID 10 IFHI 11 IFLO 12 GAIN
13 COM2 14 IFOP
15 DMIP
16 VPS2 17 QOUT
18 IOUT
19 FLTR 20 VPS1

PIN FUNCTION DESCRIPTIONS

Reads Frequency Detector Input

Common #1 Power-Up Input

Local Oscillator Input

RF “Low” Input RF “High” Input Gain Reference Input Mixer Output

Midsupply Bias Voltage IF “High” Input IF “Low” Voltage Gain Control Input

Common #2 IF Output

Demodulator Input

VPOS Supply #2 Quadrature Output

In-Phase Output

PLL Loop Filter VPOS Supply #1

Function

PLL input for I/Q demodulator quadrature oscillator, ± 400 mV drive required from external oscillator. Must be biased at VP/2. Supply common for RF front end and main bias.
3 V/5 V CMOS compatible power-up control logical high = powered-up max input level = VPS1 = VPS2. LO input, ac coupled ± 54 mV LO input required dBm for 50 input termination . Usually connected to ac ground. AC coupled, ± 56 mV, max RF input for linear operation. High impedance input, typically V, sets gain scaling. High impedance, single-sided current output, ± V max voltage output ± 6 mA max current output . Output of the midsupply bias generator VMID = VPOS/2 . AC coupled IF input, ± 56 mV max input for linear operation. Reference node for IF input auto-offset null.

High impedance input, 0 V using 3 V supply, max gain at V =

Supply common for IF stages and demodulator. Low impedance, single-sided voltage output, 5 dBm ± 560 mV max. Signal input to I and Q demodulators ± 150 mV max input at IF > 3 MHz for linear operation ± 75 mV max input at IF < 3 MHz for linear operation. Must be biased at VP/2. Supply to high-level IF, PLL, and demodulators. Low impedance Q baseband output ± V full scale in 20 min load ac coupled. Low impedance I baseband output ± V full scale in 20 min load ac coupled.

Series RC PLL Loop filter, connected to ground.

Supply to mixer, low level IF, PLL, and gain control.

PIN CONNECTION 20-Lead SSOP RS-20

FDIN 1
20 VPS1

COM1 2
19 FLTR

PRUP 3
18 IOUT

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AD61009ARSRL Datasheet file may be downloaded here without warranties.

Datasheet ID: AD61009ARSRL 517720