EN5330DC
EN5330DC Datasheet
EN5330
| Part | Datasheet |
|---|---|
EN5330DC |
EN5330DC (pdf) |
| Related Parts | Information |
|---|---|
|
EN5330DI |
EN5330DI |
| PDF Datasheet Preview |
|---|
| EN5330 3A Voltage Mode Synchronous Buck PWM DC-DC Converter with Integrated Inductor July 2007 The EN5330 is a Power System on a Chip DCDC converter. It is specifically designed to meet the precise voltage and fast transient requirements of present and future highperformance, low-power processor, DSP, FPGA, memory boards and system level applications in a distributed power architecture. Advanced circuit techniques, ultra high switching frequency, and very advanced, high-density, integrated circuit and proprietary inductor technology deliver highquality, ultra compact, non-isolated DC-DC conversion. Operating this converter requires only three external components that include small value input and output ceramic capacitors and a soft-start capacitor. The EN5330 significantly helps in system design and productivity by offering greatly simplified board design, layout and manufacturing requirements. In addition, a reduction in the number of vendors required for the complete power solution helps to enable an overall system cost savings. Typical Application Circuit VIN 22µF 15nF PVIN AVIN ENABLE PGND VSENSE VOUT AGND PGND VID Output Voltage Select 47µF VOUT Typical application circuit. • Features Integrated Inductor Technology • Small solution size 1/3rd size of competitors • Output matched to 90 nm silicon • Low part count only 3 external parts required • Low output ripple 20mV typical • Package optimized for low EMI • Up to 10W output power at VOUT=3.3V • High switching Frequency 5MHz • High Efficiency greater than 90% • Very fast transient response • Wide input voltage range of 2.375V to 5.5V • Digital voltage selector with options for common output voltages from 0.8V to 3.3V • External resistor divider and OVP option for output voltages from 0.8V to VIN-600mV • Output enable pin and Power OK signal • Programmable soft-start time • Over-current protection • Thermal shutdown, short circuit, output over- voltage and input under-voltage protection • RoHS compliant, MSL3 rated to 260°C • Space constrained or noise and ripple sensitive applications • Servers, workstations and PCs • Broadband, networking, LAN/WAN, optical telecommunications equipment • Point of load regulation for low-power processors, network processors, DSPs, FPGAs, and ASICs 90 nm silicon • Low voltage, distributed power architectures with 2.5V, 3.3V or 5V rails Ordering Information Part Number EN5330DC-T EN5330DI-T EN5330DC-E Temp Rating Package 0 to 70 36-pin DFN T&R -40 to +85 36-pin DFN T&R DFN Evaluation Board Enpirion 2007 all rights reserved, E&OE July 2007 Pin Configuration This diagram is a top-view of the component and represents the on-board layout requirements for the landing pads and thermal connection points. Specific dimensions for the pads are presented on page Pin 1 of the device is signified by the white dot marked on the top of the device. Block Diagram Enpirion 2007 all rights reserved, E&OE Efficiency % Efficiency % July 2007 Typical Efficiency 3.3V 2.5V 1.8V 1.5V 1.2V 0.8V 55 VIN = 5.0V Load Current A Efficiency versus load, VIN = 5.0V VOUT = 0.8V 3.3V. Waveforms 2.5V 1.8V 1.5V 1.2V 0.8V 55 VIN = 3.3V Load Current A Efficiency versus load, VIN = 3.3V VOUT = 0.8V 2.5V. IOUT slew rate = 10A/µS Load Transient, VIN = 5.0V, VOUT = 1.2V, 0 3A. ENABLE VOUT IOUT slew rate = 10A/µS |
| More datasheets: EL3V271B00 | FDB2570 | FDP2570 | 9698010100E | 968EMC0018 | 67-21B/R6C-AU2W1B/ET | VAOD-C301S9-BW/47 | VAOD-A301S9-BW/47 | KC7050T212.500L3AEYF | EN5330DI |
Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived EN5330DC Datasheet file may be downloaded here without warranties.