A6800SL-T

A6800SL-T Datasheet

A6800 and A6801 DABiC-5 Latched Sink Drivers

Part	Datasheet
A6800SL-T	A6800SL-T (pdf)

Related Parts	Information
A6801SEP-T	A6801SEP-T
A6801SA-T	A6801SA-T
A6801SLW-T	A6801SLW-T

PDF Datasheet Preview
A6800 and A6801 DABiC-5 Latched Sink Drivers to 5 V logic supply range Up to 10 MHz data input rate High-voltage, high-current outputs Darlington current-sink outputs, with improved low-saturation voltages CMOS, TTL compatible inputs Output transient protection Internal pull-down resistors Low-power CMOS latches Packages A6800 14-pin mm DIP A package A6800 14-pin SOICN L package A6801 22-pin mm DIP A package Approximate scale 1:1 A6801 24-pin SOICW LW package A6801 28-pin PLCC EP package The A6800 and A6801 latched-input BiMOS ICs merge high-current, high-voltage outputs with CMOS logic. The CMOS input section consists of 4 or 8 data D type latches with associated common CLEAR, STROBE, and OUTPUT ENABLE circuitry. The power outputs are bipolar NPN Darlingtons. This merged technology provides versatile, interface. These BiMOS power interface ICs greatly the of computer or microprocessor I/O. The A6800 ICs each contain four latched drivers. A6801 ICs contain eight latched drivers. The CMOS inputs are compatible with standard CMOS circuits. TTL circuits may mandate the addition of input pull-up resistors. The bipolar Darlington outputs are suitable for directly driving many peripheral/power loads relays, lamps, solenoids, small DC motors, and so forth. All devices have open-collector outputs and integral diodes for inductive load transient suppression. The output transistors are capable of sinking 600 mA and can withstand at least 50 V in the off state. Because of limitations on package power dissipation, the simultaneous operation of all drivers at maximum rated current can only be accomplished by a reduction in duty cycle. Outputs may be paralleled for higher load current capability. Continued on the next S UP P LY V DD Functional Block Diagram C OMMON OUT N S TR OBE CLE AR OUTPUT E NABLE C OMMON MOS C ONTR OL TYP IC AL MOS LATC H GR OUND TYPIC AL BIPOLAR DR IVE 26180.110e A6800 and A6801 DABiC-5 Latched Sink Drivers Description continued The A6800SA is furnished in a 14-pin DIP with mm in. row centers the A6800SL and A6801SLW in surfacemountable SOICs the A6801SA in a 22-pin DIP with mm in. row centers the A6801SEP in a 28-lead PLCC. These devices are lead Pb free, with 100% matte tin plated leadframes. Applications include: Relays Lamps Solenoids Small DC motors Selection Guide Package Packing A6800SA-T 14-pin DIP 25 per tube A6800SL-T 14-pin SOIC 56 per tube A6800SLTR-T

PDF Datasheet Preview

A6800 and A6801 DABiC-5 Latched Sink Drivers
to 5 V logic supply range Up to 10 MHz data input rate High-voltage, high-current outputs Darlington current-sink outputs, with improved low-saturation
voltages CMOS, TTL compatible inputs Output transient protection Internal pull-down resistors Low-power CMOS latches

Packages

A6800 14-pin mm DIP

A package

A6800 14-pin SOICN

L package

A6801 22-pin mm DIP

A package

Approximate scale 1:1

A6801 24-pin SOICW LW package

A6801 28-pin PLCC EP package

The A6800 and A6801 latched-input BiMOS ICs merge high-current, high-voltage outputs with CMOS logic. The CMOS input section consists of 4 or 8 data D type latches with associated common CLEAR, STROBE, and OUTPUT ENABLE circuitry. The power outputs are bipolar NPN Darlingtons. This merged technology provides versatile, interface. These BiMOS power interface ICs greatly the of computer or microprocessor I/O. The A6800 ICs each contain four latched drivers. A6801 ICs contain eight latched drivers.

The CMOS inputs are compatible with standard CMOS circuits. TTL circuits may mandate the addition of input pull-up resistors. The bipolar Darlington outputs are suitable for directly driving many peripheral/power loads relays, lamps, solenoids, small DC motors, and so forth.

All devices have open-collector outputs and integral diodes for inductive load transient suppression. The output transistors are capable of sinking 600 mA and can withstand at least 50 V in the off state. Because of limitations on package power dissipation, the simultaneous operation of all drivers at maximum rated current can only be accomplished by a reduction in duty cycle. Outputs may be paralleled for higher load current capability.

Continued on the next

S UP P LY V DD

Functional Block Diagram

C OMMON OUT N

S TR OBE

CLE AR OUTPUT E NABLE

C OMMON MOS C ONTR OL

TYP IC AL MOS LATC H

GR OUND TYPIC AL BIPOLAR DR IVE
26180.110e

A6800 and A6801

DABiC-5 Latched Sink Drivers

Description continued The A6800SA is furnished in a 14-pin DIP with mm in. row centers the A6800SL and A6801SLW in surfacemountable SOICs the A6801SA in a 22-pin DIP with mm in. row centers the A6801SEP in a 28-lead PLCC. These devices are lead Pb free, with 100% matte tin plated leadframes.

Applications include:

Relays Lamps Solenoids Small DC motors

Selection Guide

Package

Packing

A6800SA-T
14-pin DIP
25 per tube

A6800SL-T
14-pin SOIC
56 per tube

A6800SLTR-T

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Datasheet ID: A6800SL-T 516052