AK8856VN

AK8856VN Datasheet

[ AK8856 ]

Part	Datasheet
AK8856VN	AK8856VN (pdf)

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ASAHI KASEI [ AK8856 ] AK8856 NTSC/PAL Digital Video Decoder The AK8856 decodes NTSC or PAL composite video signals into digital video data. The outputs are ITU-R BT. 601 level compatible Y, Cb and Cr signals. The decoded result is scaled to 601, VGA interlaced output , CIF, QVGA, QCIF, rotated QVGA , or rotated CIF progressive . Information including closed caption, VBID, and WSS are encoded in the video signal can be read out externally. The AK8856 is controlled by through an I2C interface. • NTSC-M, NTSC-4.43 / PAL- B, D, G, H, I, N, Nc, M, 60 composite signal decoding process • 10 Bit ADC sampling at 24.5454MHz or 27MHz • Integrated PGA 0dB ~ 12dB • Automatic color control ACC function • Adaptive automatic gain control AGC function • 1D or 2D YC separation • Phase compensation for PAL • Output interface - ITU-R BT.656 output format 4:2:2 8-bit parallel output with EAV / SAV - Camera interface - Interface with HD / VD / DVALID signals • Closed caption decoding function read by register setting • VBID CGMS-A decoding function CRCC decode read by register setting • WSS decoding function read by register setting • Macrovision signal detect function • Power-down function • 2-channel analog input selector • I2C control compatible • Core voltage AVDD, DVDD - 1.8V • I/O voltage PVDD - 3.3V AK8856VG / - 3.6V AK8856VN • Package 41 FBGA 4.0mm x 4.0mm / 48 QFN 7.2mm x 7.2mm * The output that meets the ITU-R BT.656 standard according to the fineness of the input signal might not be available. 2007/03 ASAHI KASEI [ AK8856 ] Block Diagram XTI XTO LPF SCL SDA PDN RSTN CLKMOD AIN1 AIN2 27MHz Clock GEN PLL 27MHz -> 27.0000MHz or 24.5454MHz 27 or 24.5454MHz MUX CLAMP PGA 10-bit ADC Decimation Filter YC Sep 2D/1D VREF I2C bus uC Interface Register Output Buffer SYNC-Separation AGC Ctrl VBI Info Timing Controller Timing Y Cb Cr Luminance Processor Scaling 640 -> 320 720 -> 58 U Decimation Filter Chrominance Processor Pixel Interpolator Ordering Guide [ AK8856 ] 2007/03 ASAHI KASEI [ AK8856 ] AK8856VG Pin Layout Drawing 7654321 A B C D E F G Bottom View AIN1 VCOM VRP AVDD IREF CLKMOD DVSS AIN2 AVSS DVDD DVSS TEST2 NSIG VD/VAF* DVALID DATA7 DATA5 DATA3 NC HD/VD DATA6 DATA4 DATA2 * “VD/VAF” is described “VD/VAF/FIELD” in this datasheet. Top View XTI PDN RSTN SCL SDA DATA1 DATA0 TEST0 XTO DVDD OE PVDD DTCLK TEST1 2007/03 ASAHI KASEI AK8856VN [ AK8856 ] NC XTO DVSS XTI CLKMOD VRN VRP IREF VCOM LPF AIN1 AVDD AVSS AIN2 DVSS DVDD NSIG MACDET DVALID 48 47 46 45 44 43 42 41 40 39 38 37 48 QFN TOP VIEW 13 14 15 16 17 18 19 20 21 22 23 24 NC TEST0 PDN DVDD RSTN OE SCL PVDD SDA DTCLK TEST1 NC NC DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 HD/HV VD/VAF/FIELD 2007/03

PDF Datasheet Preview

ASAHI KASEI
[ AK8856 ]

AK8856

NTSC/PAL Digital Video Decoder

The AK8856 decodes NTSC or PAL composite video signals into digital video data. The outputs are ITU-R BT. 601 level compatible Y, Cb and Cr signals. The decoded result is scaled to 601, VGA interlaced output , CIF, QVGA, QCIF, rotated QVGA , or rotated CIF progressive . Information including closed caption, VBID, and WSS are encoded in the video signal can be read out externally. The AK8856 is controlled by through an I2C interface.
• NTSC-M, NTSC-4.43 / PAL- B, D, G, H, I, N, Nc, M, 60 composite signal decoding process
• 10 Bit ADC sampling at 24.5454MHz or 27MHz
• Integrated PGA 0dB ~ 12dB
• Automatic color control ACC function
• Adaptive automatic gain control AGC function
• 1D or 2D YC separation
• Phase compensation for PAL
• Output interface
- ITU-R BT.656 output format 4:2:2 8-bit parallel output with EAV / SAV - Camera interface - Interface with HD / VD / DVALID signals
• Closed caption decoding function read by register setting
• VBID CGMS-A decoding function CRCC decode read by register setting
• WSS decoding function read by register setting
• Macrovision signal detect function
• Power-down function
• 2-channel analog input selector
• I2C control compatible
• Core voltage AVDD, DVDD - 1.8V
• I/O voltage PVDD - 3.3V AK8856VG / - 3.6V AK8856VN
• Package 41 FBGA 4.0mm x 4.0mm / 48 QFN 7.2mm x 7.2mm
* The output that meets the ITU-R BT.656 standard according to the fineness of the input signal might not be available.
2007/03

ASAHI KASEI
[ AK8856 ]

Block Diagram

XTI XTO LPF

SCL SDA PDN RSTN

CLKMOD

AIN1 AIN2
27MHz

Clock GEN PLL
27MHz -> 27.0000MHz
or 24.5454MHz
27 or 24.5454MHz

MUX CLAMP PGA
10-bit ADC

Decimation Filter

YC Sep 2D/1D

VREF

I2C bus uC Interface Register

Output Buffer

SYNC-Separation AGC Ctrl VBI Info

Timing Controller

Timing

Y Cb Cr

Luminance

Processor

Scaling
640 -> 320
720 -> 58

U Decimation Filter

Chrominance

Processor

Pixel Interpolator
Ordering Guide
[ AK8856 ]
2007/03

ASAHI KASEI
[ AK8856 ]

AK8856VG

Pin Layout Drawing
7654321

A B C D E F G

Bottom View

AIN1 VCOM VRP

AVDD

IREF CLKMOD DVSS

AIN2 AVSS

DVDD DVSS

TEST2 NSIG

VD/VAF* DVALID DATA7 DATA5 DATA3

NC HD/VD DATA6 DATA4 DATA2
* “VD/VAF” is described “VD/VAF/FIELD” in this datasheet.

Top View

XTI PDN

RSTN SCL SDA DATA1 DATA0

TEST0 XTO

DVDD OE

PVDD DTCLK TEST1
2007/03

ASAHI KASEI

AK8856VN
[ AK8856 ]

NC XTO DVSS

XTI CLKMOD

VRN VRP IREF VCOM LPF AIN1

AVDD AVSS

AIN2 DVSS DVDD NSIG MACDET DVALID
48 47 46 45 44 43 42 41 40 39 38 37
48 QFN

TOP VIEW
13 14 15 16 17 18 19 20 21 22 23 24

NC TEST0 PDN DVDD RSTN OE SCL PVDD SDA DTCLK TEST1 NC

NC DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 HD/HV VD/VAF/FIELD
2007/03

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Datasheet ID: AK8856VN 515926