AK6481CM

AK6481CM Datasheet

[AK6480C/81]

Part	Datasheet
AK6481CM	AK6481CM (pdf)

PDF Datasheet Preview
ASAHI KASEI [AK6480C/81] AK6480C/81C 8Kbit Serial CMOS EEPROM ADVANCED CMOS EEPROM TECHNOLOGY READ/WRITE NON-VOLATILE MEMORY - Wide VCC 1.8V to 5.5V operation - 8192 bits 512 x 16 organization ONE CHIP MICROCOMPUTER INTERFACE - Interface with one chip microcomputer’s serial communication port directly LOW POWER CONSUMPTION - 0.8µA Max. Standby mode HIGH RELIABILITY - Endurance 1000K cycles/Address - Data Retention 10 years SPECIAL FEATURES - 8 word Page Write Mode - High speed operation fMAX=5MHz VCC=4.5V to 5.5V - Automatic write cycle time-out with auto-ERASE 5ms Max. - Automatic address increment READ - Ready/ Busy status signal - Software and Hardware controlled write protection IDEAL FOR LOW DENSITY DATA STORAGE - Low cost, space saving, 8-pin package SOP, SSOP, MSOP, SON INSTRUCTION REGISTER CS SK INSTRUCTION DECODE, CONTROL AND CLOCK GENERATION DATA REGISTER R/W AMPS AUTO ERASE ADD. BUFFERS DECODER EEPROM 8192bit 512 x16 VPP SW RESET DAS04E-00 VREF VPP GENERATOR Block diagram -1- RDY/BUSY 2005/03 ASAHI KASEI [AK6480C/81] The AK6480C/81C is a 8192bit, serial, read/write, non-volatile memory device fabricated using an advanced CMOS EEPROM technology. The AK6480C/81C has 8192bits of memory organized into 512 registers of 16 bits each. The AK6480C/81C can operate full function under wide operating voltage range from 1.8V to 5.5V. The charge up circuit is integrated for high voltage generation that is used for write operation. The AK6480C/81C can connect to the serial communication port of popular one chip microcomputer directly 3 line negative clock synchronous interface . At write operation, AK6480C/81C takes in the write data from data input pin DI to a register synchronously with rising edge of input pulse of serial clock pin SK And at read operation, AK6480C/81C takes out the read data from a register to data output pin DO synchronously with falling edge of SK The AK6480C/81C has 5 instructions such as READ, WRITE, PAGE WRITE, WREN write enable and WRDS write disable . Each instruction is organized by op-code block 8bits , address block 8bits and data 8bits x When input level of SK pin is high level and input level of chip select CS pin is changed from high level to low level, AK6480C/81C can receive the instructions. Special features of the AK6480C/81C include automatic write time-out with auto-ERASE, Ready/ Busy status signal output and ultra-low standby power mode when deselected CS =high . Software and Hardware controlled write protection The AK6480C/81C has 2 hardware and software write protection functions. After power on or after execution of WRDS write disable instruction, execution of WRITE instruction will be disabled. This write protection condition continues until WREN instruction is executed or VCC is removed from the part. Execution of READ instruction is independent of both WREN and WRDS instructions. Reset pin should be low level when WRITE instruction is executed. When the Reset pin is high level, the WRITE instruction is not executed. Ready/ Busy status signal During the automatic write time-out period Busy status , the AK6480C/81C can't accept the other instructions. The AK6480C/81C has 2 functions to know the Busy status from exterior. The RDY/ BUSY pin indicates the Busy status regardless of the CS pin status. The RDY/ BUSY pin outputs the low level regardless of the CS pin status during Busy status. Except the above status, this pin outputs high level. Also the DO pin indicates the Busy status. When input level of SK pin is low level and input level of CS pin is changed from high level to low level, the AK6480C/81C is in the status output mode and the DO pin indicates the Ready/ Busy status. The Ready/ Busy status outputs on DO pin until CS pin is changed from low level to high level, or first bit "1" of op-code of next instruction is given to the part. Except when the device is in the status output mode or outputs data, the DO pin is in the high impedance state. DAS04E-00 2005/03

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ASAHI KASEI
[AK6480C/81]

AK6480C/81C
8Kbit Serial CMOS EEPROM

ADVANCED CMOS EEPROM TECHNOLOGY

READ/WRITE NON-VOLATILE MEMORY - Wide VCC 1.8V to 5.5V operation - 8192 bits 512 x 16 organization

ONE CHIP MICROCOMPUTER INTERFACE - Interface with one chip microcomputer’s serial communication port directly

LOW POWER CONSUMPTION - 0.8µA Max. Standby mode

HIGH RELIABILITY
- Endurance
1000K cycles/Address
- Data Retention 10 years

SPECIAL FEATURES - 8 word Page Write Mode - High speed operation fMAX=5MHz VCC=4.5V to 5.5V - Automatic write cycle time-out with auto-ERASE 5ms Max. - Automatic address increment READ - Ready/ Busy status signal - Software and Hardware controlled write protection

IDEAL FOR LOW DENSITY DATA STORAGE - Low cost, space saving, 8-pin package SOP, SSOP, MSOP, SON

INSTRUCTION REGISTER

CS SK

INSTRUCTION DECODE, CONTROL AND CLOCK

GENERATION

DATA

REGISTER

R/W AMPS

AUTO ERASE

ADD. BUFFERS

DECODER

EEPROM
8192bit 512 x16

VPP SW

RESET

DAS04E-00

VREF

VPP GENERATOR

Block diagram -1-

RDY/BUSY
2005/03

ASAHI KASEI
[AK6480C/81]

The AK6480C/81C is a 8192bit, serial, read/write, non-volatile memory device fabricated using an advanced CMOS EEPROM technology. The AK6480C/81C has 8192bits of memory organized into 512 registers of 16 bits each. The AK6480C/81C can operate full function under wide operating voltage range from 1.8V to 5.5V. The charge up circuit is integrated for high voltage generation that is used for write operation. The AK6480C/81C can connect to the serial communication port of popular one chip microcomputer directly 3 line negative clock synchronous interface . At write operation, AK6480C/81C takes in the write data from data input pin DI to a register synchronously with rising edge of input pulse of serial clock pin SK And at read operation, AK6480C/81C takes out the read data from a register to data output pin DO synchronously with falling edge of SK The AK6480C/81C has 5 instructions such as READ, WRITE, PAGE WRITE, WREN write enable and WRDS write disable . Each instruction is organized by op-code block 8bits , address block 8bits and data 8bits x When input level of SK pin is high level and input level of chip select CS pin is changed from high level to low level, AK6480C/81C can receive the instructions. Special features of the AK6480C/81C include automatic write time-out with auto-ERASE, Ready/ Busy status signal output and ultra-low standby power mode when deselected CS =high .

Software and Hardware controlled write protection The AK6480C/81C has 2 hardware and software write protection functions. After power on or after execution of WRDS write disable instruction, execution of WRITE instruction will be disabled. This write protection condition continues until WREN instruction is executed or VCC is removed from the part. Execution of READ instruction is independent of both WREN and WRDS instructions. Reset pin should be low level when WRITE instruction is executed. When the Reset pin is high level, the WRITE instruction is not executed.

Ready/ Busy status signal During the automatic write time-out period Busy status , the AK6480C/81C can't accept the other instructions. The AK6480C/81C has 2 functions to know the Busy status from exterior. The RDY/ BUSY pin indicates the Busy status regardless of the CS pin status. The RDY/ BUSY pin outputs the low level regardless of the CS pin status during Busy status. Except the above status, this pin outputs high level. Also the DO pin indicates the Busy status. When input level of SK pin is low level and input level of CS pin is changed from high level to low level, the AK6480C/81C is in the status output mode and the DO pin indicates the Ready/ Busy status. The Ready/ Busy status outputs on DO pin until CS pin is changed from low level to high level, or first bit "1" of op-code of next instruction is given to the part. Except when the device is in the status output mode or outputs data, the DO pin is in the high impedance state.

DAS04E-00
2005/03

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Datasheet ID: AK6481CM 515917