ACT8848QM135-T

ACT8848QM135-T Datasheet


ACT8848

Part Datasheet
ACT8848QM135-T ACT8848QM135-T ACT8848QM135-T (pdf)
Related Parts Information
EA8848 EA8848 EA8848
ACT8848QM201-T ACT8848QM201-T ACT8848QM201-T
ACT8848QM144-T ACT8848QM144-T ACT8848QM144-T
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ACT8848

Advanced PMU for Multi-core Application Processors

INTEGRATED POWER SUPPLIES
• Four DC/DC Step-Down Buck Regulators
− 2 x 2.8A, 2 x 1.5A
• Five Low-Noise LDOs 350mA
• Three Low-Input Voltage LDOs 350mA
• One Low IQ Keep-Alive LDO
• Backup Battery Charger

SYSTEM CONTROL AND INTERFACE
• Six General Purpose I/O with PWM Drivers
• I2C Serial Interface
• Interrupt Controller

SYSTEM MANAGEMENT
• Reset Interface and Sequencing Controller
− Power on Reset − Soft / Hard Reset − Watchdog Supervision − Multiple Sleep Modes
• Thermal Management Subsystem
• Tablet PC
• Mobile Internet Devices MID
• Ebooks
• Personal Navigation Devices
The ACT8848 is a complete, cost effective, and highly-efficient ActivePMUTM power management solution optimized for the power, voltage sequencing and control requirements of Telechips TCC88xx and Samsung S5PC210 application processors. Please see the ORDERING INFORMATION section to get the Full Part Numbers.

The ACT8848 features four fixed-frequency, current-mode, synchronous PWM step-down converters that achieve peak efficiencies of up to These regulators operate with a fixed frequency of 2.25MHz, minimizing noise in sensitive applications and allowing the use of small external components. These buck regulators supply up to 2.8A of output current and can fully satisfy the power and control requirements of the multi-core application processors. Dynamic Voltage Scaling DVS is supported either by dedicated control pins, or through I2C interface to optimize the energy-pertask performance for the processors. This device also includes eight low-noise LDOs up to 350mA per LDO , one always-ON LDO and an integrated backup battery charger to provide the complete power system for the processors.

The power sequence and reset controller provides power-on reset, SW-initiated reset, and power cycle reset for the processor. It also features the watchdog supervisory function. Multiple sleep modes with autonomous sleep and wake-up sequence control are supported.

The thermal management and protection subsystem allows the host processor to manage the power dissipation of the PMU and the overall system dynamically. The PMU provides a thermal warning to the host processor when the temperature reaches a certain threshold such that the system can turn off some of the non-essential functions, reduce the clock frequency and etc to manage the system temperature.

The ACT8848 is available in a compact, Pb-Free and RoHS-compliant TQFN66-48 package.

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Active-Semi Authorized Recipients and Customers

ActivePMUTM is a trademark of Active-Semi.

I2CTM is a trademark of NXP.

Copyright 2012 Active-Semi, Inc.

TABLE OF CONTENTS
General Information 01 Functional Block 03 Ordering 04 Pin Configuration 04 Pin 05 Absolute Maximum Ratings 07 I2C Interface Electrical Characteristics 08 Global Register Map 09 Register and Bit Descriptions 11 System Control Electrical 16 Step-Down DC/DC Electrical Characteristics 17 Low-Noise LDO Electrical 18 Low-Input Voltage LDO Electrical 19 Low-Power Always-On LDO Electrical 20 PWM LED Driver Electrical 20 Typical Performance 21

System Control Information 26 Interfacing with the Telechips TCC88xx Processors 26 Control Signals 27 Push-Button 28 Control 28 Watch-Dog Supervision 28 Software-Initiated Power Cycle 28

Functional Description 30 I2C Interface 30 Housekeeping 30 Thermal Protection 30

Step-Down DC/DC Regulators 31 General 31 100% Duty Cycle 31 Operating 31 Synchronous 31 Soft-Start 31 Compensation 31 Configuration 31 OK[ ] and Output Fault 32 PCB Layout Considerations 32

Low-Noise, Low-Dropout Linear 33 General 33 Output Current Limit 33 Compensation 33 Configuration 33 OK[ ] and Output Fault 33 PCB Layout Considerations 33

PWM LED 35 PWM Frequency 35 PWM Duty Cycle Selection 35

TQFN66-48 Package Outline and Dimensions 36

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Active-Semi Authorized Recipients and Customers

ActivePMUTM is a trademark of Active-Semi.

I2CTM is a trademark of NXP.

Copyright 2012 Active-Semi, Inc.

FUNCTIONAL BLOCK DIAGRAM

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Active-Semi Authorized Recipients and Customers

ActivePMUTM is a trademark of Active-Semi.

I2CTM is a trademark of NXP.

Copyright 2012 Active-Semi, Inc.
ORDERING INFORMATIONc

PART NUMBER VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 VOUT6 VOUT7 VOUT8 VOUT9 VOUT10 VOUT11 VOUT12 VOUT13 ACT8848QM135-T 1.8V 1.45V 1.25V 3.3V 2.8V 3.3V 3.3V 1.8V 1.2V 1.2V 1.8V 1.8V 3.3V ACT8848QM144-T 1.5V 1.45V 1.25V 3.3V 2.8V 3.3V 3.3V 1.8V 1.2V 1.2V 1.8V 1.8V 3.3V

ACT8848QM201-T 1.2V 1.2V 1.1V 1.1V 1.1V 1.1V 2.8V 1.8V 3.3V 1.2V 1.1V 1.8V 1.8V

PACKAGE TQFN66-48

PINS TEMPERATURE RANGE
-40°C to +85°C
c All Active-Semi components are RoHS Compliant and with Pb-free plating unless specified differently. The term Pb-free means semiconductor products that are in compliance with current RoHS Restriction of Hazardous Substances standards.
2 ACT8848QM144-T has the same specification as ACT8848QM135-T except VOUT1 which is set as 1.5V to support DDR III application.
3 ACT8848 Data Sheet is described according to ACT8848QM135-T application please see the Appendix of ACT8848QM201-T for its specification.

ACT8848QM_ _ -T

Active-Semi Product Number

Package Code Pin Count Option Code Tape and Reel

PIN CONFIGURATION

TOP VIEW

Thin - QFN TQFN66-48

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Active-Semi Authorized Recipients and Customers

ActivePMUTM is a trademark of Active-Semi.

I2CTM is a trademark of NXP.

Copyright 2012 Active-Semi, Inc.

PIN DESCRIPTIONS

NAME

Switch Node for REG3.

Power Ground for REG3. Connect GP14, GP2, GP3, and GA together at a single point as close to the IC as possible.

OUT10

REG10 output. Bypass it to ground with a 2.2µF capacitor.

OUT11

REG11 output. Bypass it to ground with a 2.2µF capacitor.

INL3

Power input for REG10, REG11 and REG12.

OUT12

REG12 output. Bypass it to ground with a 2.2µF capacitor.

VSELR2

Output Voltage Selection for REG2. Drive to logic low to select default output voltage. Drive to logic high to select secondary output voltage.
10 11, 12 13, 14
15 16 17 18
nPBSTAT GP2 SW2 VP2 OUT2

Active-Low Open-Drain Push-Button Status Output. nPBSTAT is asserted low whenever the nPBIN is pushed, and is high-Z otherwise.

Power ground for REG2. Connect GP14, GP2, GP3, and GA together at a single point as close to the IC as possible.

Switch Node for REG2.

Power input for REG2. Bypass to GP2 with a high quality ceramic capacitor placed as close to the IC as possible.
c VNOM refers to the nominal output voltage level for VOUT as defined by the Ordering Information section. 2 IMAX Maximum Output Current.

MAX 100 2 1% 10

UNIT V mV µA µA V mV
%/V %/A %/A %VNOM %VNOM MHz kHz µs ns

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Active-Semi Authorized Recipients and Customers

ActivePMUTM is a trademark of Active-Semi.

I2CTM is a trademark of NXP.

Copyright 2012 Active-Semi, Inc.

LOW-NOISE LDO ELECTRICAL CHARACTERISTICS

VINL1 = VINL2 = 3.6V, COUT5 = COUT6 = COUT7 = COUT8 = COUT9 = 2.2µF, TA = 25°C, unless otherwise specified.

PARAMETER

TEST CONDITIONS

Operating Voltage Range

Output Voltage Accuracy

VOUT 1.0V, IOUT = 10mA VOUT < 1.0V, IOUT = 10mA

Line Regulation Load Regulation Power Supply Rejection Ratio

Supply Current per Output

VINL = Max VOUT + 0.5V, 3.6V to 5.5V IOUT = 1mA to IMAX2 f = 1kHz, IOUT = 20mA, VOUT = 1.2V f = 10kHz, IOUT = 20mA, VOUT = 1.2V Regulator Enabled Regulator Disabled

Soft-Start Period Power Good Threshold Power Good Hysteresis

Output Noise

VOUT = 3.0V VOUT Rising VOUT Falling IOUT = 20mA, f = 10Hz to 100kHz, VOUT = 1.2V

Discharge Resistance

LDO Disabled, DIS[ ] = 1

LDO rated at 350mA REG5, REG6, REG7, REG8 & REG9

Dropout Voltagee

IOUT = 160mA, VOUT > 3.1V

Maximum Output Current

Current Limitf

VOUT = 95% of regulation voltage

Recommend Output Capacitor

MIN -1

TYP VNOMc
75 65 25 0 140 92
140 350 400

MAX 1 10

UNIT V % mV V/A
µs % % µVRMS
mV mA µF
c VNOM refers to the nominal output voltage level for VOUT as defined by the Ordering Information section.
2 IMAX Maximum Output Current.
3 Dropout Voltage is defined as the differential voltage between input and output when the output voltage drops 100mV below the regulation voltage for 3.1V output voltage or higher .
f LDO current limit is defined as the output current at which the output voltage drops to 95% of the respective regulation voltage. Under heavy overload conditions the output current limit folds back by 50% typ.

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Active-Semi Authorized Recipients and Customers

ActivePMUTM is a trademark of Active-Semi.

I2CTM is a trademark of NXP.

Copyright 2012 Active-Semi, Inc.

LOW-INPUT VOLTAGE LDO ELECTRICAL CHARACTERISTICS

VINL3 = 3.6V, COUT10 = COUT11 = COUT12 = 2.2µF, TA = 25°C, unless otherwise specified.

PARAMETER

TEST CONDITIONS

Operating Voltage Range

Output Voltage Accuracy

VOUT 1.0V, IOUT = 10mA VOUT < 1.0V, IOUT = 10mA

Line Regulation Load Regulation Power Supply Rejection Ratio

Supply Current per Output

VINL = Max VOUT + 0.5V, 3.6V to 5.5V IOUT = 1mA to IMAX2 f = 1kHz, IOUT = 20mA, VOUT = 1.2V f = 10kHz, IOUT = 20mA, VOUT = 1.2V Regulator Enabled Regulator Disabled

Soft-Start Period Power Good Threshold Power Good Hysteresis

Output Noise

VOUT = 3.0V VOUT Rising VOUT Falling IOUT = 20mA, f = 10Hz to 100kHz, VOUT = 1.2V

Discharge Resistance

LDO Disabled, DIS[ ] = 1

LDO rated at 350mA REG10, REG11 & REG12

Dropout Voltagee

IOUT = 160mA, VOUT > 3.1V

Maximum Output Current

Current Limitf

VOUT = 95% of regulation voltage

Recommend Output Capacitor

MIN TYP MAX

VNOMc
100 200 350 400

UNIT V % mV V/A
µs % % µVRMS
mV mA µF
c VNOM refers to the nominal output voltage level for VOUT as defined by the Ordering Information section.
2 IMAX Maximum Output Current.
3 Dropout Voltage is defined as the differential voltage between input and output when the output voltage drops 100mV below the regulation voltage for 3.1V output voltage or higher .
f LDO current limit is defined as the output current at which the output voltage drops to 95% of the respective regulation voltage. Under heavy overload conditions the output current limit folds back by 50% typ

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Active-Semi Authorized Recipients and Customers

ActivePMUTM is a trademark of Active-Semi.

I2CTM is a trademark of NXP.

Copyright 2012 Active-Semi, Inc.

LOW-POWER ALWAYS-ON LDO ELECTRICAL CHARACTERISTICS

VINL1 = 3.6V, COUT13 = 1µF, TA = 25°C, unless otherwise specified.

PARAMETER REG13 Operating Voltage Range Output Voltage Accuracy Line Regulation Supply Current from VINL1 Maximum Output current Recommend Output Capacitor

TEST CONDITIONS VINL1 = Max VOUT + 0.2V, 2.5V to 5.5V

MIN TYP MAX UNIT

VNOMc

PWM LED DRIVER ELECTRICAL CHARACTERISTICS

VINL2 = 3.6V, TA = 25°C, unless otherwise specified.

PARAMETER

TEST CONDITIONS

Output Current
100% Duty Cycle

Output Low Voltage

Feed in with 6mA

Leakage Current

Sinking from 5.5V source

PWM Frequency

FRE[2:0] = 000

PWM Duty Adjustment

DUTY[3:0] = 0000 to 1111

TYP MAX UNIT
c VNOM refers to the nominal output voltage level for VOUT as defined by the Ordering Information section.

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Active-Semi Authorized Recipients and Customers

ActivePMUTM is a trademark of Active-Semi.

I2CTM is a trademark of NXP.

Copyright 2012 Active-Semi, Inc.

TYPICAL PERFORMANCE CHARACTERISTICS

TA = 25°C, unless otherwise specified.

ACT8848-002

VREF V Frequency MHz

VREF vs. Temperature
-40 -20 0 20 40 60 80 100 120 140

Temperature °C

ACT8848-001

Frequency vs. Temperature
-40 -20 0 20 40 60 80 100 120 140

Temperature °C

Startup of VIN/OUT13

Startup Shutdown of nPBIN/OUT2/OUT3/ OUT1/nRSTO/PWRHLD

ACT8848-004

ACT8848-003

CH1 Vin, 2V/div CH2 VOUT13, 2V/div TIME 1ms/div

Startup of nPBIN/OUT2/OUT11/OUT3/ OUT1/OUT4

CH1 VnPBIN, 2V/div CH2 VOUT2, 2V/div CH3 VOUT3, 2V/div CH4 VOUT1, 2V/div CH5 VnRSTO, 2V/div CH6 VPWRHLD, 5V/div TIME 20ms/div

Startup of nPBIN/OUT2/OUT5/OUT6/ OUT10/OUT12

ACT8848-006

ACT8848-005

CH1 VnPBIN, 2V/div CH2 VOUT2, 2V/div CH3 VOUT11, 2V/div CH4 VOUT3, 1V/div CH5 VOUT1, 2V/div CH6 VOUT4, 5V/div TIME 10ms/div

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ActivePMUTM is a trademark of Active-Semi.

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CH6 CH1 VnPBIN, 2V/div CH2 VOUT2, 1V/div CH3 VOUT5, 2V/div CH4 VOUT6, 5V/div CH5 VOUT10, 2V/div CH6 VOUT12, 2V/div TIME 10ms/div

Copyright 2012 Active-Semi, Inc.

TYPICAL PERFORMANCE CHARACTERISTICS CONT’D

TA = 25°C, unless otherwise specified.

Startup Shutdown of OUT2/OUT11/ OUT3/OUT1

Startup Shutdown of OUT2/OUT4/OUT5/ OUT6/OUT10/OUT12

ACT8848-008
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Datasheet ID: ACT8848QM135-T 522578