ACT8847QM171-T

ACT8847QM171-T Datasheet


ACT8847

Part Datasheet
ACT8847QM171-T ACT8847QM171-T ACT8847QM171-T (pdf)
PDF Datasheet Preview
ACT8847

Advanced PMU for Multi-core Application Processors

INTEGRATED POWER SUPPLIES
• Four DC/DC Step-Down Buck Regulators
2 x 2.8A, 2 x 1.5A
• Five Low-Noise LDOs
2 x 150mA, 3 x 350mA
• Three Low-Input Voltage LDOs
1 x 150mA, 2 x 350mA
• One Low IQ Keep-Alive LDO
• Backup Battery Charger

SYSTEM CONTROL AND INTERFACE
• Six General Purpose I/O with PWM Drivers
• I2C Serial Interface
• Interrupt Controller

SYSTEM MANAGEMENT
• Reset Interface and Sequencing Controller

Power on Reset Soft / Hard Reset Watchdog Supervision Multiple Sleep Modes
• Thermal Management Subsystem
• Tablet PC
• Mobile Internet Devices MID
• Ebooks
• Personal Navigation Devices
The ACT8847 is a complete, cost effective, and highly-efficient ActivePMUTM power management solution optimized for the power, voltage sequencing and control requirements of Samsung Exynos 4210 S5PC210/S5PV310 and other application processors. Please See Ordering Information Section and its Appendix.

The ACT8847 features four fixed-frequency, current-mode, synchronous PWM step-down converters that achieve peak efficiencies of up to These regulators operate with a fixed frequency of 2.25MHz, minimizing noise in sensitive applications and allowing the use of small external components. These buck regulators supply up to 2.8A of output current and can fully satisfy the power and control requirements of the multi-core application processor. Dynamic Voltage Scaling DVS is supported either by dedicated control pins, or through I2C interface to optimize the energy-pertask performance for the processor. This device also include eight low-noise LDOs up to 350mA per LDO , one always-ON LDO and an integrated backup battery charger to provide a complete power system for the processor.

The power sequence and reset controller provides power-on reset, SW-initiated reset, and power cycle reset for the processor. It also features the watchdog supervisory function. Multiple sleep modes with autonomous sleep and wake-up sequence control are supported.

The thermal management and protection subsystem allows the host processor to manage the power dissipation of the PMU and the overall system dynamically. The PMU provides a thermal warning to the host processor when the temperature reaches a certain threshold such that the system can turn off some of the non-essential functions, reduce the clock frequency and etc to manage the system temperature.

The ACT8847 is available in a compact, Pb-Free and RoHS-compliant TQFN66-48 package.

Innovative PowerTM

ActivePMUTM is a trademark of Active-Semi.

I2CTM is a trademark of NXP.

Copyright 2015-2017 Active-Semi, Inc.

FUNCTIONAL BLOCK DIAGRAM

VIO nRSTO

PUSH BUTTON
nPBIN

VIO nPBSTAT

VIO nIRQ

ACT8847

INL2

PWRHLD PWREN VSELR2

SCL SDA

REFBP

GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6

Reference

System Control

Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of NXP.

REG1

REG2

REG3

REG4

REG5 LDO

REG6 LDO

REG7 LDO

REG8 LDO

REG9 LDO

REG10 LDO

REG11 LDO

REG12 LDO

REG13 RTC LDO

To Battery

SW1 OUT1 GP14

OUT1

To Battery
ORDERING

PART NUMBER VOUT1 VOUT2 VOUT3 ACT8847QM102-T 1.35V 3.3V 3.8V ACT8847QM171-T 1.2V 1.2V 1.1V

VOUT4 1.3V 1.1V

VOUT5 VOUT6 VOUT7 VOUT8 VOUT9 VOUT10 VOUT11 VOUT12 VOUT13 3.3V OFF 3.3V OFF 3.3V 1.1V 1.1V 3.3V 1.8V 3.3V 1.2V 1.1V 1.8V 1.8V

ACT8847QM174-T 1.5V 1.2V 1.1V 1.1V 1.1V 1.1V 3.3V 1.8V 3.3V 1.5V 1.1V 1.8V 1.8V

ACT8847QM211-T 1.3V 1.1V 1.5V OFF 3.3V 1.8V 2.5V OFF 2.8V OFF 3.3V

ACT8847QM600-T 1.0V 1.3V 1.0V 1.125V 1.8V 3.0V 1.8V 3.3V 3.3V 1.1V 1.8V 1.0V 1.8V

ACT8849QM614-T 2.8V 1.2V 2.0V 2.8V 1.8V 1.8V 2.8V 1.8V 1.8V 1.0V 1.2V 1.0V 1.8V

ACT8847QM502-T 1.4V 1.4V 1.5V 3.3V OFF 2.8V 1.8V 3.0V 2.5V OFF 3.2V

ACT8847QM503-T OFF 1.4V 3.3/3.1V 1.5/1.35V 2.5V OFF 3.3V 1.8V OFF 1.2V 0.75V 3.3V

PACKAGE TQFN66-48

PINS TEMPERATURE RANGE
-40°C to +85°C

ACT8847Q M_ _-T

Active-Semi Product Number

Package Code Pin Count CMI Option Tape and Reel

All Active-Semi components are RoHS Compliant and with Pb-free plating unless specified differently. The term Pb-free means semiconductor products that are in compliance with current RoHS Restriction of Hazardous Substances standards. The Package Code designator “Q” represents QFN.

The Pin Count designator “M” represents 48 pins.
 “xxx” represents the CMI Code Matrix Index option. The CMI identifies the IC’s default register settings.

ACT8847QM174-T is dedicated to S5PV310 application.

ACT8847 Data Sheet is described according to ACT8847QM171-T application please see the Appendix of ACT8847QM211-T for its specification.

ACT8847QM600-T and ACT8849QM614-T is the association application for Samsung Exynos 4412/ 4212 platforms please see the Appendix of APP_ACT8847 ACT8849_Rev0_16JUN14_P for its specification.
 ACT8847QM502-T is dedicated to Freescale i.MX6 application.

ACT8847QM102-T is dedicated to Freescale i.MX6UL/i.MX6ULL with custom startup and system level considerations

Innovative PowerTM

ActivePMUTM is a trademark of Active-Semi.

I2CTM is a trademark of NXP.

Copyright 2015-2017 Active-Semi, Inc.

PIN CONFIGURATION

TOP VIEW

VP3 OUT3 GPIO1 GPIO2 GPIO3 OUT5 INL1 OUT6 GPIO4 OUT7 OUT13

SW3 GP3 OUT10 OUT11 INL3 OUT12 VSELR2 nPBSTAT GP2 SW2

ACT8847

GPIO5 GPIO6 nIRQ nRSTO PWRHLD nPBIN VP1 OUT1 SW1 GP14 SW4 VP4

VP2 OUT2 PWREN REFBP INL2 OUT9 GA OUT4 OUT8 SDA SCL

Thin - QFN TQFN66-48

Innovative PowerTM

ActivePMUTM is a trademark of Active-Semi.

I2CTM is a trademark of NXP.

Copyright 2015-2017 Active-Semi, Inc.

PIN DESCRIPTIONS
VNOM refers to the nominal output voltage level for VOUT as defined by the Ordering Information section. IMAX Maximum Output Current.

MAX 100 2 1% 10

UNIT V mV µA µA V mV
%/V %/A %/A %VNOM %VNOM MHz kHz µs ns

Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of NXP.
- 17 -

Copyright 2015-2017 Active-Semi, Inc.

LOW-NOISE LDO ELECTRICAL CHARACTERISTICS

VINL1 = VINL2 = 3.6V, COUT5 = COUT6 = COUT7 = COUT8 = COUT9 = 2.2µF, TA = 25°C, unless otherwise specified.

PARAMETER

TEST CONDITIONS

MIN TYP

Operating Voltage Range

Output Voltage Accuracy

VOUT 1.0V, IOUT = 10mA VOUT < 1.0V, IOUT = 10mA

Line Regulation

VINL = Max VOUT + 0.5V, 3.6V to 5.5V

Load Regulation

IOUT = 1mA to

Power Supply Rejection Ratio
f = 1kHz, IOUT = 20mA, VOUT = 1.2V
f = 10kHz, IOUT = 20mA, VOUT = 1.2V

Regulator Enabled

Supply Current per Output

Regulator Disabled

Soft-Start Period

VOUT = 3.0V

Power Good Threshold

VOUT Rising

Power Good Hysteresis

VOUT Falling

Output Noise

IOUT = 20mA, f = 10Hz to 100kHz, VOUT = 1.2V

Discharge Resistance

LDO Disabled, DIS[ ] = 1

LDO rated at 150mA REG5 & REG6

Dropout Voltage Maximum Output Current Limit

IOUT = 80mA, VOUT > 3.1V VOUT = 95% of regulation voltage

Recommend Output Capacitor

LDO rated at 350mA REG7, REG8 & REG9

Dropout Voltage
VNOM refers to the nominal output voltage level for VOUT as defined by the Ordering Information section.

IMAX Maximum Output Current.

Dropout Voltage is defined as the differential voltage between input and output when the output voltage drops 100mV below the regulation voltage for 3.1V output voltage or higher .
 LDO current limit is defined as the output current at which the output voltage drops to 95% of the respective regulation voltage. Under heavy overload conditions the output current limit folds back by 50% typ.

Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of NXP.
- 18 -

Copyright 2015-2017 Active-Semi, Inc.

LOW-INPUT VOLTAGE LDO ELECTRICAL CHARACTERISTICS

VINL3 = 3.6V, COUT10 = COUT11 = COUT12 = 2.2µF, TA = 25°C, unless otherwise specified.

PARAMETER

TEST CONDITIONS

Operating Voltage Range

Output Voltage Accuracy

VOUT 1.0V, IOUT = 10mA VOUT < 1.0V, IOUT = 10mA

Line Regulation Load Regulation Power Supply Rejection Ratio

Supply Current per Output

VINL = Max VOUT + 0.5V, 3.6V to 5.5V IOUT = 1mA to f = 1kHz, IOUT = 20mA, VOUT = 1.2V f = 10kHz, IOUT = 20mA, VOUT = 1.2V Regulator Enabled Regulator Disabled

Soft-Start Period Power Good Threshold Power Good Hysteresis

Output Noise

VOUT = 3.0V VOUT Rising

VOUT Falling

IOUT = 20mA, f = 10Hz to 100kHz, VOUT = 1.2V

Discharge Resistance

LDO Disabled, DIS[ ] = 1

LDO rated at 150mA REG10 Dropout Voltage

IOUT = 80mA, VOUT > 3.1V

Maximum Output Current

MIN TYP MAX
100 200 150

Current Limit Recommend Output Capacitor

VOUT = 95% of regulation voltage

LDO rated at 350mA REG11 & REG12

Dropout Voltage

IOUT = 160mA, VOUT > 3.1V

Maximum Output Current

Current Limit

VOUT = 95% of regulation voltage

Recommend Output Capacitor
100 200 350 400

UNIT V % mV V/A
µs % % µVRMS
VNOM refers to the nominal output voltage level for VOUT as defined by the Ordering Information section.

IMAX Maximum Output Current.

Dropout Voltage is defined as the differential voltage between input and output when the output voltage drops 100mV below the regulation voltage for 3.1V output voltage or higher .
 LDO current limit is defined as the output current at which the output voltage drops to 95% of the respective regulation voltage. Under heavy overload conditions the output current limit folds back by 50% typ

Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of NXP.
- 19 -

Copyright 2015-2017 Active-Semi, Inc.

LOW-POWER ALWAYS-ON LDO ELECTRICAL CHARACTERISTICS

VINL1 = 3.6V, COUT13 = 1µF, TA = 25°C, unless otherwise specified.

PARAMETER REG13 VNOM = 1.8V Operating Voltage Range Output Voltage Accuracy Line Regulation Supply Current from VINL1 Maximum Output current Recommend Output Capacitor

TEST CONDITIONS VINL1 = Max VOUT + 0.2V, 2.5V to 5.5V

MIN TYP MAX UNIT

PWM LED DRIVER ELECTRICAL CHARACTERISTICS

VINL2 = 3.6V, TA = 25°C, unless otherwise specified.

PARAMETER

TEST CONDITIONS

Output Current
100% Duty Cycle

Output Low Voltage

Feed in with 6mA

Leakage Current

Sinking from 5.5V source

PWM Frequency

FRE[2:0] = 000

PWM Duty Adjustment

DUTY[3:0] = 0000 to 1111

TYP MAX UNIT
VNOM refers to the nominal output voltage level for VOUT as defined by the Ordering Information section.

Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of NXP.
- 20 -

Copyright 2015-2017 Active-Semi, Inc.

TYPICAL PERFORMANCE CHARACTERISTICS

TA = 25°C, unless otherwise specified.

ACT8847-002

VREF V Frequency MHz

VREF vs. Temperature
-40 -20 0 20 40 60 80 100 120 140

Temperature °C

ACT8847-001

Frequency vs. Temperature
-40 -20 0
20 40 60 80 100 120 140

Temperature °C

ACT8847-004

Startup of OUT6/4/2/3

CH4 CH1 VOUT6, 1V/div CH2 VOUT4, 1V/div CH3 VOUT2, 1V/div CH4 VOUT3, 1V/div TIME 400µs/div

ACT8847-003

Startup of OUT5/7/1/12

CH4 CH1 VOUT5, 1V/div CH2 VOUT7, 2V/div CH3 VOUT1, 1V/div CH4 VOUT12, 2V/div TIME 400µs/div

ACT8847-006

Startup of OUT3/5/7/12

CH4 CH1 VOUT3, 1V/div CH2 VOUT5, 1V/div CH3 VOUT7, 2V/div CH4 VOUT12, 1V/div TIME 200µs/div

ACT8847-005

Startup of OUT11/10/8/9

CH4 CH1 VOUT11, 1V/div CH2 VOUT10, 1V/div CH3 VOUT8, 500mV/div CH4 VOUT9, 2V/div TIME 400µs/div

Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of NXP.
- 21 -

Copyright 2015-2017 Active-Semi, Inc.

TYPICAL PERFORMANCE CHARACTERISTICS CONT’D

TA = 25°C, unless otherwise specified.

Startup of nPBIN, OUT6/4/2

Startup of nPBIN, OUT6, nRSTO

ACT8847-008

ACT8847-007

CH4 CH1 VnPBIN, 2V/div CH2 VOUT6, 1V/div CH3 VOUT4, 1V/div CH4 VOUT2, 1V/div TIME 10ms/div

Sleep of PWREN, OUT3/5/11

CH3 CH1 VnPBIN, 2V/div CH2 VOUT6, 1V/div CH3 VnRSTO, 2V/div TIME 20ms/div

Sleep of PWREN, OUT4/2/3
More datasheets: 74LCX32244G | 74LCX32244GX | 60480 | DPS060200UPS-P5P-SZ | 25-21/T1D-ANQHY/2A | DFR0245-R | DFR0245-G | PTS453SL38 LFS | PTS453TL38 LFS | 10120633-001LF


Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived ACT8847QM171-T Datasheet file may be downloaded here without warranties.

Datasheet ID: ACT8847QM171-T 522570