NDT452P

NDT452P Datasheet

NDT452P

Part	Datasheet
NDT452P	NDT452P (pdf)

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September 1996 NDT452P P-Channel Enhancement Mode Field Effect Transistor Power SOT P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and DC motor control. -3A, -30V. RDS ON = VGS = -10V. High density cell design for extremely low RDS ON . High power and current handling capability in a widely used surface mount package. Absolute Maximum Ratings Symbol Parameter TA = 25°C unless otherwise noted VDSS Drain-Source Voltage VGSS Gate-Source Voltage Drain Current - Continuous - Pulsed Note 1a Maximum Power Dissipation Note 1a Note 1b Note 1c TJ,TSTG Operating and Storage Temperature Range THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case * Order option J23Z for cropped center drain lead. Note 1a Note 1 1997 Fairchild Semiconductor Corporation NDT452P -30 ±20 ±3 ±20 3 -65 to 150 42 12 Units V A W °C °C/W °C/W Electrical Characteristics TA = 25°C unless otherwise noted Symbol Parameter Conditions OFF CHARACTERISTICS BVDSS IDSS Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = -250 µA VDS = -24 V, VGS = 0 V IGSSF Gate - Body Leakage, Forward IGSSR ON CHARACTERISTICS Note 2

PDF Datasheet Preview

September 1996

NDT452P

P-Channel Enhancement Mode Field Effect Transistor

Power SOT P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and DC motor control.
-3A, -30V. RDS ON = VGS = -10V.

High density cell design for extremely low RDS ON . High power and current handling capability in a widely used surface mount package.

Absolute Maximum Ratings

Symbol Parameter

TA = 25°C unless otherwise noted

VDSS

Drain-Source Voltage

VGSS

Gate-Source Voltage

Drain Current - Continuous
- Pulsed

Note 1a

Maximum Power Dissipation

Note 1a

Note 1b Note 1c

TJ,TSTG Operating and Storage Temperature Range THERMAL CHARACTERISTICS

Thermal Resistance, Junction-to-Ambient

Thermal Resistance, Junction-to-Case
* Order option J23Z for cropped center drain lead.

Note 1a Note 1
1997 Fairchild Semiconductor Corporation

NDT452P -30 ±20 ±3 ±20 3
-65 to 150
42 12

Units V A W
°C °C/W °C/W

Electrical Characteristics TA = 25°C unless otherwise noted

Symbol Parameter

Conditions

OFF CHARACTERISTICS

BVDSS IDSS

Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current

VGS = 0 V, ID = -250 µA VDS = -24 V, VGS = 0 V

IGSSF

Gate - Body Leakage, Forward

IGSSR

ON CHARACTERISTICS Note 2

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Datasheet ID: NDT452P 634637