NDS9430A

NDS9430A Datasheet

NDS9430A Single P-Channel Enhancement Mode Field Effect Transistor

Part	Datasheet
NDS9430A	NDS9430A (pdf)

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December 1997 NDS9430A Single P-Channel Enhancement Mode Field Effect Transistor These P-Channel enhancement mode power field effect transistors are produced using National's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. -5.3A, -20V. RDS ON = VGS = -10V RDS ON = VGS = -6V RDS ON = VGS = -4.5V. High density cell design for extremely low RDS ON . High power and current handling capability in a widely used surface mount package. Absolute Maximum Ratings TA = 25°C unless otherwise noted Symbol Parameter VDSS Drain-Source Voltage VGSS Gate-Source Voltage Drain Current - Continuous - Pulsed Note 1a Maximum Power Dissipation Note 1a Note 1b Note 1c TJ,TSTG Operating and Storage Temperature Range THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Note 1a Thermal Resistance, Junction-to-Case Note 1 1997 Fairchild Semiconductor Corporation NDS9430A -20 ± 20 ± ± 20 1 -55 to 150 50 25 Units V A W °C °C/W °C/W Electrical Characteristics TA = 25°C unless otherwise noted Symbol Parameter Conditions OFF CHARACTERISTICS BVDSS IDSS Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current IGSSF Gate - Body Leakage, Forward IGSSR ON CHARACTERISTICS Note 2 VGS th Gate Threshold Voltage VGS = 0 V, ID = -250 µA VDS = -16 V, VGS = 0 V VDS = -10 V, VGS = 0 V VGS = 20 V, VDS = 0 V VGS = -20 V, VDS= 0 V

PDF Datasheet Preview

December 1997

NDS9430A Single P-Channel Enhancement Mode Field Effect Transistor

These P-Channel enhancement mode power field effect transistors are produced using National's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
-5.3A, -20V. RDS ON = VGS = -10V RDS ON = VGS = -6V RDS ON = VGS = -4.5V.

High density cell design for extremely low RDS ON .

High power and current handling capability in a widely used surface mount package.

Absolute Maximum Ratings TA = 25°C unless otherwise noted

Symbol Parameter

VDSS

Drain-Source Voltage

VGSS

Gate-Source Voltage

Drain Current - Continuous
- Pulsed

Note 1a

Maximum Power Dissipation

Note 1a Note 1b

Note 1c

TJ,TSTG Operating and Storage Temperature Range THERMAL CHARACTERISTICS

Thermal Resistance, Junction-to-Ambient Note 1a

Thermal Resistance, Junction-to-Case

Note 1
1997 Fairchild Semiconductor Corporation

NDS9430A -20 ± 20 ± ± 20 1
-55 to 150
50 25

Units V A W
°C °C/W °C/W

Electrical Characteristics TA = 25°C unless otherwise noted

Symbol Parameter

Conditions

OFF CHARACTERISTICS

BVDSS IDSS

Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current

IGSSF

Gate - Body Leakage, Forward

IGSSR

ON CHARACTERISTICS Note 2

VGS th

Gate Threshold Voltage

VGS = 0 V, ID = -250 µA VDS = -16 V, VGS = 0 V VDS = -10 V, VGS = 0 V VGS = 20 V, VDS = 0 V VGS = -20 V, VDS= 0 V

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Datasheet ID: NDS9430A 634624