RFD4N06LSM9A

RFD4N06LSM9A Datasheet

RFD4N06L, RFD4N06LSM

Part	Datasheet
RFD4N06LSM9A	RFD4N06LSM9A (pdf)

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Data Sheet RFD4N06L, RFD4N06LSM January 2002 4A, 60V, Ohm, Logic Level, N-Channel Power MOSFETs The RFD4N06L, RFD4N06LSM are N-Channel enhancement mode silicon gate power effect transistors designed for use with logic level 5 volt driving sources in applications such as programmable controllers, automotive switching, and solenoid drivers. This performance is accomplished through a special gate oxide design which provides full rated conduction at gate biases in the 3-5 volt range, thereby facilitating true on-off power control from logic circuit supply voltages. Formerly developmental type TA09520. Ordering Information PACKAGE BRAND RFD4N06L TO-251AA RFD4N06L RFD4N06LSM TO-252AA RFD4N06LSM NOTE When ordering, use the entire part number. • 4A, 60V • rDS ON = • Design Optimized for 5 Volt Gate Drive • Can be Driven Directly From Q-MOS, N-MOS, or TTL Circuits • SOA is Power Dissipation Limited • 175oC Rated Junction Temperature • Logic Level Gate • High Input Impedance • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Packaging JEDEC TO-251AA DRAIN FLANGE SOURCE DRAIN GATE JEDEC TO-252AA DRAIN FLANGE GATE SOURCE 2002 Fairchild Semiconductor Corporation RFD4N06L, RFD4N06LSM Absolute Maximum Ratings TC = 25oC, Unless Otherwise Drain to Source Breakdown Voltage Note 1 VDS Drain to Gate Voltage Note .VDGR Gate to Source Voltage VGS Continuous Drain Current .ID Pulsed Drain Current Note 3 IDM Maximum Power Dissipation Derated above 25oC. Operating and Storage Temperature TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in 1.6mm from Case for 10s. TL Package Body for 10s, See Techbrief 334 .Tpkg RFD4N06L RFD4N06LSM 60 ±1 0 4 10 30 -55 to 175 300 260 UNITS V A W W/oC CAUTION Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this is not implied. NOTE TJ = 25oC to 150oC. Electrical TC = 25oC, Unless Otherwise PARAMETER TEST CONDITIONS Drain to Source Breakdown Voltage Gate to Threshold Voltage Zero Gate Voltage Drain Current Gate to Source Leakage Current Drain to Source On Voltage Note 2 Drain to Source On Resistance Note 2 Forward Transconductance Note 2 Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate to Source + Gate to Drain Gate Charge at 5V Threshold Gate Charge Thermal Resistance Junction to Case BVDSS ID = 1mA, VGS = 0V V GS TH I DSS VGS = VDS, ID = 250µA TC = 25oC, VDS = 50V, VGS = 0V TC = 125oC, VDS = 50V, VGS = 0V IGSS VGS = ±10V, VDS = 0V VDS ON ID = 1A, VGS = 5V

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Data Sheet

RFD4N06L, RFD4N06LSM

January 2002
4A, 60V, Ohm, Logic Level, N-Channel Power MOSFETs

The RFD4N06L, RFD4N06LSM are N-Channel enhancement mode silicon gate power effect transistors designed for use with logic level 5 volt driving sources in applications such as programmable controllers, automotive switching, and solenoid drivers. This performance is accomplished through a special gate oxide design which provides full rated conduction at gate biases in the 3-5 volt range, thereby facilitating true on-off power control from logic circuit supply voltages.

Formerly developmental type TA09520.
Ordering Information

PACKAGE

BRAND

RFD4N06L

TO-251AA

RFD4N06L

RFD4N06LSM

TO-252AA

RFD4N06LSM
NOTE When ordering, use the entire part number.
• 4A, 60V
• rDS ON =
• Design Optimized for 5 Volt Gate Drive
• Can be Driven Directly From Q-MOS, N-MOS,
or TTL Circuits
• SOA is Power Dissipation Limited
• 175oC Rated Junction Temperature
• Logic Level Gate
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount Components to PC Boards”

Packaging

JEDEC TO-251AA

DRAIN FLANGE

SOURCE DRAIN GATE

JEDEC TO-252AA

DRAIN FLANGE

GATE SOURCE
2002 Fairchild Semiconductor Corporation

RFD4N06L, RFD4N06LSM

Absolute Maximum Ratings TC = 25oC, Unless Otherwise

Drain to Source Breakdown Voltage Note 1 VDS

Drain to Gate Voltage Note .VDGR

Gate to Source Voltage VGS

Continuous Drain Current .ID

Pulsed Drain Current Note 3 IDM

Maximum Power Dissipation Derated above 25oC.

Operating and Storage Temperature TJ, TSTG

Maximum Temperature for Soldering

Leads at 0.063in 1.6mm from Case for 10s. TL Package Body for 10s, See Techbrief 334 .Tpkg

RFD4N06L RFD4N06LSM
60 ±1 0 4 10 30 -55 to 175
300 260

UNITS V A W

W/oC

CAUTION Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this is not implied.

NOTE TJ = 25oC to 150oC.

Electrical TC = 25oC, Unless Otherwise

PARAMETER

TEST CONDITIONS

Drain to Source Breakdown Voltage Gate to Threshold Voltage Zero Gate Voltage Drain Current

Gate to Source Leakage Current Drain to Source On Voltage Note 2

Drain to Source On Resistance Note 2 Forward Transconductance Note 2 Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate to Source + Gate to Drain Gate Charge at 5V Threshold Gate Charge Thermal Resistance Junction to Case

BVDSS ID = 1mA, VGS = 0V

V GS TH I DSS

VGS = VDS, ID = 250µA TC = 25oC, VDS = 50V, VGS = 0V TC = 125oC, VDS = 50V, VGS = 0V

IGSS VGS = ±10V, VDS = 0V

VDS ON ID = 1A, VGS = 5V

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Datasheet ID: RFD4N06LSM9A 634566