MM74HC4050MTC

MM74HC4050MTC Datasheet


MM74HC4049<br>• MM74HC4050 Hex Inverting Logic Level Down Converter<br>• Hex Logic Level Down Converter

Part Datasheet
MM74HC4050MTC MM74HC4050MTC MM74HC4050MTC (pdf)
Related Parts Information
MM74HC4050MTCX MM74HC4050MTCX MM74HC4050MTCX
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MM74HC4049MTCX MM74HC4049MTCX MM74HC4049MTCX
MM74HC4049M MM74HC4049M MM74HC4049M
MM74HC4049MX MM74HC4049MX MM74HC4049MX
MM74HC4049MTC MM74HC4049MTC MM74HC4049MTC
MM74HC4050MX MM74HC4050MX MM74HC4050MX
MM74HC4050N MM74HC4050N MM74HC4050N
MM74HC4049N MM74HC4049N MM74HC4049N
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MM74HC4049
• MM74HC4050 Hex Inverting Logic Level Down Converter
• Hex Logic Level Down Converter

MM74HC4049
• MM74HC4050 Hex Inverting Logic Level Down Converter
• Hex Logic Level Down Converter

The MM74HC4049 and the MM74HC4050 utilize advanced silicon-gate CMOS technology, and have a modified input protection structure that enables these parts to be used as logic level translators which will convert high level logic to a low level logic while operating from the low logic supply. For example, CMOS logic can be converted to logic when using a 5V supply. The modified input protection has no diode connected to VCC, thus allowing the input voltage to exceed the supply. The lower zener diode protects the input from both positive and negative static voltages. In addition each part can be used as a sim-
ple buffer or inverter without level translation. The MM74HC4049 is pin and functionally compatible to the CD4049BC and the MM74HC4050 is compatible to the CD4050BC
s Typical propagation delay 8 ns s Wide power supply range s Low quiescent supply current 20 µA maximum 74HC s Fanout of 10 LS-TTL loads
Ordering Code:

Order Number Package Number Package Description

MM74HC4049M

M16A
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow

MM74HC4049SJ

M16D
16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide

MM74HC4049MTC

MTC16
16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153. 4.4mm Wide

MM74HC4049N

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide

MM74HC4050M

M16A
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow

MM74HC4050SJ

M16D
16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide

MM74HC4050MTC

MTC16
16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153. 4.4mm Wide

MM74HC4050N

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagrams

MM74HC4049 1999 Fairchild Semiconductor Corporation DS005214

MM74HC4050

MM74HC4049
• MM74HC4050

Absolute Maximum Ratings Note 1

Note 2

Supply Voltage VCC DC Input Voltage VIN DC Output Voltage VOUT Clamp Diode Current IZK, IOK DC Output Current, per pin IOUT DC VCC or GND Current, per pin ICC Storage Temperature Range TSTG Power Dissipation PD

Note 3

S.O. Package only

Lead Temperature TL Soldering 10 seconds
to +7.0V to +18V to VCC +0.5V
−20 mA ±25 mA ±50 mA −65°C to +150°C
600 mW 500 mW
260°C

Recommended Operating Conditions

Min Max Units

Supply Voltage VCC DC Input Voltage
0 15 V

DC Output Voltage
0 VCC V

VOUT

Operating Temperature Range TA −40 +85 °C

Input Rise or Fall Times
tr, tf VCC = 2.0V
1000 ns

VCC = 4.5V
500 ns

VCC = 6.0V
400 ns

Note 1 Absolute Maximum Ratings are those values beyond which damage to the device may occur.

Note 2 Unless otherwise specified all voltages are referenced to ground.

Note 3 Power Dissipation temperature derating plastic “N” package − 12 mW/°C from 65°C to 85°C.

DC Electrical Characteristics Note 4

Parameter

Conditions

TA = 25°C

TA = −40°C to 85°C TA = −55°C to 125°C Units

Guaranteed Limits

Minimum HIGH Level Input

Voltage
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Datasheet ID: MM74HC4050MTC 634385