MM74HC251 8-Channel 3-STATE Multiplexer
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MM74HC251MX (pdf) |
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MM74HC251N |
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MM74HC251SJX |
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MM74HC251MTCX |
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MM74HC251M |
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MM74HC251MTC |
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MM74HC251SJ |
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MM74HC251 8-Channel 3-STATE Multiplexer MM74HC251 8-Channel 3-STATE Multiplexer The MM74HC251 8-channel digital multiplexer with 3STATE outputs utilizes advanced silicon-gate CMOS technology. Along with the high noise immunity and low power consumption of standard CMOS integrated circuits, it possesses the ability to drive 10 LS-TTL loads. The large output drive capability and 3-STATE feature make this part ideally suited for interfacing with bus lines in a bus oriented system. This multiplexer features both true Y and complement W outputs as well as a STROBE input. The STROBE must be at a low logic level to enable this device. When the STROBE input is HIGH, both outputs are in the high impedance state. When enabled, address information on the data select inputs determines which data input is routed to the Y and W outputs. The 74HC logic family is speed, function, as well as pinout compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground. s Typical propagation delay Data select to Y 26 ns s Wide supply range s Low power supply quiescent current: 80 µA maximum 74HC s 3-STATE outputs for interface to bus oriented systems Ordering Code: Order Number Package Number Package Description MM74HC251M M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, Narrow MM74HC251SJ M16D 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide MM74HC251MTC MTC16 16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide MM74HC251N N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP Top View 1999 Fairchild Semiconductor Corporation DS005328.prf MM74HC251 Truth Table Inputs Select H = HIGH Logic Level, L = LOW Logic Level X = Irrelevant, Z = High Impedance off D0, D1. D7 = The level of the respective D input Logic Diagram Strobe S H L Outputs MM74HC251 Absolute Maximum Ratings Note 1 Note 2 Recommended Operating Conditions Supply Voltage VCC DC Input Voltage VIN DC Output Voltage VOUT Clamp Diode Current IIK, IOK DC Output Current, per pin IOUT DC VCC or GND Current, per pin ICC Storage Temperature Range TSTG Power Dissipation PD Note 3 S.O. Package only Lead Temperature TL Soldering 10 seconds to +7.0V to VCC +1.5V to VCC +0.5V ±20 mA ±25 mA ±50 mA −65°C to +150°C 600 mW 500 mW 260°C Min Max Units Supply Voltage VCC DC Input or Output Voltage VIN, VOUT Operating Temperature Range TA −40 +85 Input Rise or Fall Times tr, tf VCC = 2.0V 1000 ns VCC = 4.5V VCC = 6.0V Note 1 Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2 Unless otherwise specified all voltages are referenced to ground. Note 3 Power Dissipation temperature derating plastic “N” package − 12 mW/°C from 65°C to 85°C. DC Electrical Characteristics Note 4 Parameter Conditions TA = 25°C TA = −40 to 85°C TA = −55 to 125°C Units |
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