MM74HC157MTC

MM74HC157MTC Datasheet

MM74HC157 Quad 2-Input Multiplexer

Part	Datasheet
MM74HC157MTC	MM74HC157MTC (pdf)

Related Parts	Information
MM74HC157N	MM74HC157N
MM74HC157SJ	MM74HC157SJ
MM74HC157M	MM74HC157M
MM74HC157MTCX	MM74HC157MTCX
MM74HC157MX	MM74HC157MX
MM74HC157SJX	MM74HC157SJX

PDF Datasheet Preview
MM74HC157 Quad 2-Input Multiplexer MM74HC157 Quad 2-Input Multiplexer The MM74HC157 high speed Quad 2-to-1 Line data selector/Multiplexers utilizes advanced silicon-gate CMOS technology. It possesses the high noise immunity and low power consumption of standard CMOS integrated circuits, as well as the ability to drive 10 LS-TTL loads. This device consists of four 2-input digital multiplexers with common select and STROBE inputs. When the STROBE input is at logical “0” the four outputs assume the values as selected from the inputs. When the STROBE input is at a logical “1” the outputs assume logical The 74HC logic family is functionally as well as pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground. s Typical propagation delay 14 ns data to any output s Wide power supply range s Low power supply quiescent current 80 µA maximum 74HC Series s Fan-out of 10 LS-TTL loads s Low input current 1 µA maximum Ordering Code: Order Number Package Number Package Description MM74HC157M M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow MM74HC157SJ M16D 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide MM74HC157MTC MTC16 16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide MM74HC157N N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Pin Assignments for DIP, SOIC, SOP and TSSOP Strobe H L Inputs Select AB XX LX HX XL XH Output Y L H L H H = HIGH Level, L = LOW Level X = Irrelevant Top View 1999 Fairchild Semiconductor Corporation DS005314.prf MM74HC157 Logic Diagram MM74HC157 Absolute Maximum Ratings Note 1 Note 2 Supply Voltage VCC DC Input Voltage VIN DC Output Voltage VOUT Clamp Diode Current IIK, IOK DC Output Current, per pin IOUT DC VCC or GND Current, per pin ICC Storage Temperature Range TSTG Power Dissipation PD Note 3 S.O. Package only Lead Temperature TL Soldering 10 seconds to +7.0V to VCC +1.5V to VCC +0.5V ±20 mA ±25 mA ±50 mA −65°C to +150°C 600 mW 500 mW 260°C Recommended Operating Conditions Min Max Units Supply Voltage VCC DC Input or Output Voltage VIN, VOUT Operating Temperature Range TA −40 +85 °C Input Rise or Fall Times tr, tf VCC = 2.0V 1000 ns VCC = 4.5V 500 ns VCC = 6.0V 400 ns Note 1 Absolute Maximum Ratings are those values beyond which dam- age to the device may occur. Note 2 Unless otherwise specified all voltages are referenced to ground. Note 3 Power Dissipation temperature derating plastic “N” package − 12 mW/°C from 65°C to 85°C.

PDF Datasheet Preview

MM74HC157 Quad 2-Input Multiplexer

MM74HC157 Quad 2-Input Multiplexer

The MM74HC157 high speed Quad 2-to-1 Line data selector/Multiplexers utilizes advanced silicon-gate CMOS technology. It possesses the high noise immunity and low power consumption of standard CMOS integrated circuits, as well as the ability to drive 10 LS-TTL loads.

This device consists of four 2-input digital multiplexers with common select and STROBE inputs. When the STROBE input is at logical “0” the four outputs assume the values as selected from the inputs. When the STROBE input is at a logical “1” the outputs assume logical

The 74HC logic family is functionally as well as pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.
s Typical propagation delay 14 ns data to any output s Wide power supply range s Low power supply quiescent current 80 µA maximum
74HC Series s Fan-out of 10 LS-TTL loads s Low input current 1 µA maximum
Ordering Code:

Order Number Package Number

Package Description

MM74HC157M

M16A
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow

MM74HC157SJ

M16D
16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide

MM74HC157MTC

MTC16
16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide

MM74HC157N

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Function Table

Pin Assignments for DIP, SOIC, SOP and TSSOP

Strobe H L

Inputs Select

AB XX LX HX XL XH

Output Y L H L H

H = HIGH Level, L = LOW Level X = Irrelevant

Top View
1999 Fairchild Semiconductor Corporation DS005314.prf

MM74HC157

Logic Diagram

MM74HC157

Absolute Maximum Ratings Note 1

Note 2

Supply Voltage VCC DC Input Voltage VIN DC Output Voltage VOUT Clamp Diode Current IIK, IOK DC Output Current, per pin IOUT DC VCC or GND Current, per pin ICC Storage Temperature Range TSTG Power Dissipation PD

Note 3

S.O. Package only

Lead Temperature TL Soldering 10 seconds
to +7.0V to VCC +1.5V to VCC +0.5V
±20 mA ±25 mA ±50 mA −65°C to +150°C
600 mW 500 mW
260°C

Recommended Operating Conditions

Min Max Units

Supply Voltage VCC

DC Input or Output Voltage

VIN, VOUT

Operating Temperature Range TA −40 +85 °C

Input Rise or Fall Times
tr, tf VCC = 2.0V
1000 ns

VCC = 4.5V
500 ns

VCC = 6.0V
400 ns

Note 1 Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.

Note 2 Unless otherwise specified all voltages are referenced to ground.

Note 3 Power Dissipation temperature derating plastic “N” package − 12 mW/°C from 65°C to 85°C.

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Datasheet ID: MM74HC157MTC 634374