MM74C907N

MM74C907N Datasheet

MM74C906<br>• MM74C907 Hex Open Drain N-Channel Buffers<br>• Hex Open Drain P-Channel Buffers

Part	Datasheet
MM74C907N	MM74C907N (pdf)

Related Parts	Information
MM74C906M	MM74C906M
MM74C906N	MM74C906N
MM74C906MX	MM74C906MX

PDF Datasheet Preview
MM74C906 • MM74C907 Hex Open Drain N-Channel Buffers • Hex Open Drain P-Channel Buffers MM74C906 • MM74C907 Hex Open Drain N-Channel Buffers • Hex Open Drain P-Channel Buffers The MM74C906 and MM74C907 buffers employ monolithic CMOS technology in achieving open drain outputs. The MM74C906 consists of six inverters driving six N-channel devices and the MM74C907 consists of six inverters driving six P-channel devices. The open drain feature of these buffers makes level shifting or wire AND wire OR functions by just the addition of pull-up or pull-down resistors. All inputs are protected from static discharge by diode clamps to VCC and to ground. s Wide supply voltage range 3V to 15V s Guaranteed noise margin 1V s High noise immunity VCC typ. s High current sourcing and sinking open drain outputs Ordering Code: Order Number Package Number Package Description MM74C906M M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow MM74C906N N14A 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide MM74C907N N14A 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Logic Diagrams Pin Assignments for DIP and SOIC MM74C906 MM74C907 Top View 2002 Fairchild Semiconductor Corporation DS005911 MM74C906 • MM74C907 Absolute Maximum Ratings Note 1 Voltage at Any Input Pin Voltage at Any Output Pin Operating Temperature Range MM74C906/MM74C907 Storage Temperature Range Power Dissipation Dual-In-Line Small Outline −0.3V to VCC +0.3V −40°C to +85°C −65°C to +150°C 700 mW 500 mW Operating VCC Range Absolute Maximum VCC Lead Temperature TL Soldering, 10 seconds 3V to 15V 18V 260°C Note 1 “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation. DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted Parameter Conditions CMOS TO CMOS VIN 1 VIN 0 IIN 1 IIN 0 ICC Logical “1” Input Voltage Logical “0” Input Voltage Logical “1” Input Current Logical “0” Input Current Supply Current Output Leakage VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 15V, VIN = 15V VCC = 15V, VIN = 0V VCC = 15V, Output Open MM74C906 MM74C907 CMOS/LPTTL INTERFACE VCC = 4.75V, VIN = VCC − 1.5V VCC = 4.75V, VOUT = 18V VCC = 4.75V, VIN = 1V + VCC = 4.75V, VOUT = VCC − 18V VIN 1 Logical “1” Input Voltage VIN 0 Logical “0” Input Voltage OUTPUT DRIVE CURRENT VCC = 4.75V VCC = 4.75V

PDF Datasheet Preview

MM74C906
• MM74C907 Hex Open Drain N-Channel Buffers
• Hex Open Drain P-Channel Buffers

MM74C906
• MM74C907 Hex Open Drain N-Channel Buffers
• Hex Open Drain P-Channel Buffers

The MM74C906 and MM74C907 buffers employ monolithic CMOS technology in achieving open drain outputs. The MM74C906 consists of six inverters driving six N-channel devices and the MM74C907 consists of six inverters driving six P-channel devices. The open drain feature of these buffers makes level shifting or wire AND wire OR functions by just the addition of pull-up or pull-down resistors. All inputs are protected from static discharge by diode clamps to VCC and to ground.
s Wide supply voltage range 3V to 15V s Guaranteed noise margin 1V s High noise immunity VCC typ. s High current sourcing and sinking open drain outputs
Ordering Code:

Order Number Package Number

Package Description

MM74C906M

M14A
14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow

MM74C906N

N14A
14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide

MM74C907N

N14A
14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Logic Diagrams

Pin Assignments for DIP and SOIC

MM74C906

MM74C907

Top View
2002 Fairchild Semiconductor Corporation DS005911

MM74C906
• MM74C907

Absolute Maximum Ratings Note 1

Voltage at Any Input Pin Voltage at Any Output Pin Operating Temperature Range

MM74C906/MM74C907 Storage Temperature Range Power Dissipation

Dual-In-Line Small Outline
−0.3V to VCC +0.3V
−40°C to +85°C −65°C to +150°C
700 mW 500 mW

Operating VCC Range Absolute Maximum VCC Lead Temperature TL

Soldering, 10 seconds
3V to 15V 18V
260°C

Note 1 “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Temperature Range” they are not meant to imply that the devices should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation.

DC Electrical Characteristics

Min/Max limits apply across temperature range unless otherwise noted

Parameter

Conditions

CMOS TO CMOS

VIN 1

VIN 0

IIN 1 IIN 0 ICC

Logical “1” Input Voltage

Logical “0” Input Voltage

Logical “1” Input Current Logical “0” Input Current Supply Current Output Leakage

VCC = 5V VCC = 10V VCC = 5V VCC = 10V VCC = 15V, VIN = 15V VCC = 15V, VIN = 0V VCC = 15V, Output Open

MM74C906 MM74C907 CMOS/LPTTL INTERFACE

VCC = 4.75V, VIN = VCC − 1.5V VCC = 4.75V, VOUT = 18V VCC = 4.75V, VIN = 1V + VCC = 4.75V, VOUT = VCC − 18V

VIN 1

Logical “1” Input Voltage

VIN 0

Logical “0” Input Voltage

OUTPUT DRIVE CURRENT

VCC = 4.75V VCC = 4.75V

More datasheets: 55505-01-03-B | 55505-01-03-C | 55505-01-04-A | 55505-01-04-B | 55505-01-04-C | 55505-01-05-A | 55505-01-02-A | MAX4509CPE | MM74C906M | MM74C906N

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Datasheet ID: MM74C907N 634362