MM74C90N

MM74C90N Datasheet

MM74C90<br>• MM74C93 4-Bit Decade Counter<br>• 4-Bit Binary Counter

Part	Datasheet
MM74C90N	MM74C90N (pdf)

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MM74C90 • MM74C93 4-Bit Decade Counter • 4-Bit Binary Counter MM74C90 • MM74C93 4-Bit Decade Counter • 4-Bit Binary Counter The MM74C90 decade counter and the MM74C93 binary counter and complementary MOS CMOS integrated circuits constructed with N- and P-channel enhancement mode transistors. The 4-bit decade counter can reset to zero or preset to nine by applying appropriate logic level on the R01, R02, R91 and R92 inputs. Also, a separate flip-flop on the A-bit enables the user to operate it as a divide-by-2, 5 or 10 frequency counter. The 4-bit binary counter can be reset to zero by applying high logic level on inputs R01 and R02, and a separate flip-flop on the A-bit enables the user to operate it as a divide-by-2, -8, or -16 divider. Counting occurs on the negative going edge of the input pulse. All inputs are protected against static discharge damage. s Wide supply voltage range 3V to 15V s Guaranteed noise margin 1V s High noise immunity VCC typ. s Low power compatibility: Fan out of 2 TTL driving 74L s The MM74C93 follows the MM74L93 Pinout Ordering Code: Order Number MM74C90N MM74C93N Package Number N14A Package Description 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Connection Diagrams MM74C90 MM74C93 Top View Top View 2002 Fairchild Semiconductor Corporation DS005889 MM74C90 • MM74C93 Logic Diagrams MM74C90 MM74C93 Truth Tables MM74C90 4-Bit Decade Counter BCD Count Sequence Count Output QD QC QB QA LHLH LHHL L HHH Output QA is connected to Input B for BCD count. H = HIGH Level L = LOW Level X = Irrelevant MM74C93 4-Bit Binary Counter Binary Count Sequence Count Output QD QC QB QA LHLH L HH L L HHH HLHL H LHH HHLH HHH L HHHH Output QA is connected to input B for binary count sequence. H = HIGH Level L = LOW Level X = Irrelevant MM74C90 • MM74C93 Function Tables Reset/Count Function Table Reset Inputs Output

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MM74C90
• MM74C93 4-Bit Decade Counter
• 4-Bit Binary Counter

MM74C90
• MM74C93 4-Bit Decade Counter
• 4-Bit Binary Counter

The MM74C90 decade counter and the MM74C93 binary counter and complementary MOS CMOS integrated circuits constructed with N- and P-channel enhancement mode transistors. The 4-bit decade counter can reset to zero or preset to nine by applying appropriate logic level on the R01, R02, R91 and R92 inputs. Also, a separate flip-flop on the A-bit enables the user to operate it as a divide-by-2, 5 or 10 frequency counter. The 4-bit binary counter can be reset to zero by applying high logic level on inputs R01 and R02, and a separate flip-flop on the A-bit enables the user to operate it as a divide-by-2, -8, or -16 divider. Counting occurs on the negative going edge of the input pulse.

All inputs are protected against static discharge damage.
s Wide supply voltage range 3V to 15V s Guaranteed noise margin 1V s High noise immunity VCC typ. s Low power compatibility:

Fan out of 2 TTL driving 74L s The MM74C93 follows the MM74L93 Pinout
Ordering Code:

Order Number MM74C90N MM74C93N

Package Number N14A

Package Description 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide

Connection Diagrams

MM74C90

MM74C93

Top View

Top View
2002 Fairchild Semiconductor Corporation DS005889

MM74C90
• MM74C93

Logic Diagrams

MM74C90

MM74C93

Truth Tables

MM74C90 4-Bit Decade Counter BCD Count Sequence

Count

Output

QD QC QB QA

LHLH

LHHL

L HHH

Output QA is connected to Input B for BCD count. H = HIGH Level L = LOW Level X = Irrelevant

MM74C93 4-Bit Binary Counter Binary Count Sequence

Count

Output

QD QC QB QA

LHLH

L HH L

L HHH

HLHL

H LHH

HHLH

HHH L

HHHH

Output QA is connected to input B for binary count sequence. H = HIGH Level L = LOW Level X = Irrelevant

MM74C90
• MM74C93

Function Tables

Reset/Count Function Table

Reset Inputs

Output

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Datasheet ID: MM74C90N 634359