FXL3SD206UMX
FXL3SD206UMX Datasheet
FXL3SD206 Level Shifting Voltage Translator
| Part | Datasheet |
|---|---|
FXL3SD206UMX |
FXL3SD206UMX (pdf) |
| PDF Datasheet Preview |
|---|
| FXL3SD206 Level Shifting Voltage Translator March 2009 FXL3SD206 Level Shifting Voltage Translator Two-Port SDIO MUX/DEMUX with Three Configurable Power Supplies for SDIO Device Port Expansion Bi-Directional Interface between Two Levels to 3.6V Fully Configurable Inputs and Outputs Track VDD Flexible and Programmable VDD of B and C Ports Non-Preferential Power-up either VDD Can Power Up First Output Remains in 3-State until Active VDD Level is Reached Output Switches to 3-state if either VDD is at GND Power-off Protection Bus-Hold on Data Input Eliminates the Need for SDIO Pull-up Resistors 2:1 MUX/DEMUX of SDIO Devices in 24-Terminal is Less than 1.7µs 60Mbps Throughput ESD Protection Exceeds: 12KV HBM A, B, and C port I/O to GND per JESD22-A114 1KV CDM per ESD STM5.3 SDIO Devices Cell Phone, PDA, Digital Camera, Portable GPS FXL3SD206 is a voltage translator with multiplexing and de-multiplexing functions for SDIO devices. It is designed for voltage translation over a wide range of input and output levels, from 1.65V to 3.6V. The multiplexing/de-multiplexing function of this device allows expansion of a host SDIO interface to two SDIO peripheral devices. When selected, each SDIO peripheral can communicate with the host through the same host interface. An alternative application allows two host devices to interface with a single SDIO peripheral. Port A is intended to connect to a host device and the voltage level tracks the VDDA. Ports B and C are intended to connect to peripheral devices. Peripheral I/O voltage levels track either VDD_HI or VDD_LO as determined by the VDD_SEL pin. During normal operation, VDD_HI must be greater than or equal to VDD_LO. The CH_SEL, VDD_SEL, and OE pins are referenced to VDD_CON. Channel communication from either Port A to Port B or Port A to Port C is controlled by the CH_SEL pin. The selected channel remains in 3-state until the VDD of each side reaches an active level and the OE pin reaches a valid high. Internal power-down circuitry places the selected channel of the device in 3-state if either side VDD removed. The direction of data is controlled automatically by the device. No direction control pin is required. The device senses input signals on any port automatically and transfers the data to the corresponding output. Ordering Information Operating Temperature Range FXL3SD206UMX -40 to +85°C Eco Status Green Package 24-Pin, Micro-MLP, Quad, .6mm Thick, 2.5mm x 3.4mm Body Packing Method Tape & Reel For Fairchild’s definition of “green” Eco Status, please visit: FXL3SD206 Level Shifting Voltage Translator Application Diagrams Power Management IC HOST VDDA VDD_CON VDD_LO VDD_HI VDD Select Card Select VDD_SEL CH_SEL CMD CMD_ A In MUX Out In CMD_B Output Enable DEMUX In CMD_C VDD_HI SD Card 1CLK CMD B 1D0~D3 VDD_LO SDIO Device 2CLK CMD C 2D0~D3 WiFi LAN / Bluetooth / Memory Module CLK D0~D3 CLK_A D0_A~D3_A CLK_BC D0_BC~D3_BC Figure Single Host to Two SDIO Application Diagram SD Memory SDIO Device Power Management IC |
| More datasheets: B82464Z4103M | B82464Z4472M | B82464Z4102M | B82464Z4152M | B82464Z4105M | B82464Z4104M | B82464Z4153M | B82464Z4224M | TEL0086 | 67-31B/B7C-AV2X1MZ3/BT |
Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived FXL3SD206UMX Datasheet file may be downloaded here without warranties.