FQB2P40TM

FQB2P40TM Datasheet

FQB2P40 / FQI2P40

Part	Datasheet
FQB2P40TM	FQB2P40TM (pdf)

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FQB2P40 / FQI2P40 FQB2P40 / FQI2P40 400V P-Channel MOSFET December 2000 QFETTM These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand a high energy pulse in the avalanche and commutation modes. These devices are well suited for electronic lamp ballasts based on the complementary half bridge topology. • -2.0A, -400V, RDS on = = -10 V • Low gate charge typical 10 nC • Low Crss typical pF • Fast switching • 100% avalanche tested • Improved dv/dt capability D2-PAK FQB Series I2-PAK FQI Series Absolute Maximum Ratings TC = 25°C unless otherwise noted Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL Parameter Drain-Source Voltage Drain Current - Continuous TC = 25°C - Continuous TC = 100°C Drain Current - Pulsed Note 1 Gate-Source Voltage Single Pulsed Avalanche Energy Note 2 Avalanche Current Note 1 Repetitive Avalanche Energy Note 1 Peak Diode Recovery dv/dt Note 3 Power Dissipation TA = 25°C * Power Dissipation TC = 25°C - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8” from case for 5 seconds Thermal Characteristics Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient * Thermal Resistance, Junction-to-Ambient * When mounted on the minimum pad size recommended PCB Mount ● ● FQB2P40 / FQI2P40 -400 ± 30 120 63 -55 to +150

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FQB2P40 / FQI2P40

FQB2P40 / FQI2P40
400V P-Channel MOSFET

December 2000

QFETTM

These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand a high energy pulse in the avalanche and commutation modes. These devices are well suited for electronic lamp ballasts based on the complementary half bridge topology.
• -2.0A, -400V, RDS on = = -10 V
• Low gate charge typical 10 nC
• Low Crss typical pF
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability

D2-PAK

FQB Series

I2-PAK

FQI Series

Absolute Maximum Ratings TC = 25°C unless otherwise noted

Symbol VDSS ID

IDM VGSS EAS IAR EAR dv/dt PD

TJ, TSTG TL

Parameter

Drain-Source Voltage

Drain Current
- Continuous TC = 25°C - Continuous TC = 100°C

Drain Current - Pulsed

Note 1

Gate-Source Voltage

Single Pulsed Avalanche Energy

Note 2

Avalanche Current

Note 1

Repetitive Avalanche Energy

Note 1

Peak Diode Recovery dv/dt

Note 3

Power Dissipation TA = 25°C * Power Dissipation TC = 25°C
- Derate above 25°C

Operating and Storage Temperature Range

Maximum lead temperature for soldering purposes, 1/8” from case for 5 seconds

Thermal Characteristics

Parameter

Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient * Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended PCB Mount
● ●

FQB2P40 / FQI2P40 -400 ± 30 120 63
-55 to +150

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Datasheet ID: FQB2P40TM 515153