FIN1048M

FIN1048M Datasheet

FIN1048 3.3V LVDS 4-Bit Flow-Through High Speed Differential Receiver

Part	Datasheet
FIN1048M	FIN1048M (pdf)

Related Parts	Information
FIN1048MTC	FIN1048MTC

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FIN1048 3.3V LVDS 4-Bit Flow-Through High Speed Differential Receiver FIN1048 3.3V LVDS 4-Bit Flow-Through High Speed Differential Receiver This quad receiver is designed for high speed interconnect utilizing Low Voltage Differential Signaling LVDS technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock and data. The FIN1048 can be paired with its companion driver, the FIN1047, or any other LVDS driver. s Greater than 400Mbs data rate s Flow-through pinout simplifies PCB layout s 3.3V power supply operation s 0.4ns maximum differential pulse skew s 2.5ns maximum propagation delay s Low power dissipation s Power-Off protection s Fail safe protection for open-circuit, shorted and termi- nated conditions s Meets or exceeds the TIA/EIA-644 LVDS standard s Pin compatible with equivalent RS-422 and LVPECL devices s 16-Lead SOIC and TSSOP packages save space Ordering Code: Order Number Package Number Package Description FIN1048M M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow FIN1048MTC MTC16 16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions Pin Name ROUT1, ROUT2, ROUT3, ROUT4 LVTTL Data Outputs RIN1+, RIN2+, RIN3+, RIN4+ Non-Inverting LVDS Inputs RIN1−, RIN2−, RIN3−, RIN4− Inverting LVDS Inputs Driver Enable Pin EN VCC GND Inverting Driver Enable Pin Power Supply Ground Function Table Inputs Outputs RIN+ ROUT− ROUT L or Open H L or Open L L or Open Fail Safe Condition H L or Open H = HIGH Logic Level L = LOW Logic Level X = Don’t Care Z = High Impedance Fail Safe = Open, Shorted, Terminated 2003 Fairchild Semiconductor Corporation DS500588 FIN1048 Absolute Maximum Ratings Note 1 Supply Voltage VCC DC Input Voltage VIN DC Input Voltage VOUT DC Output Current IO Storage Temperature Range TSTG Max Junction Temperature TJ Lead Temperature TL Soldering, 10 seconds ESD Human Body Model ESD Machine Model −0.5V to +4.6V −0.5V to +4.6V −0.5V to 6V 16 mA −65°C to +150°C 150°C 260°C 10,000V 450V Recommended Operating Conditions Supply Voltage VCC Magnitude of Differential Voltage 3.0V to 3.6V \|VID\| 100mV to VCC Common-Mode Input Voltage VIC

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FIN1048 3.3V LVDS 4-Bit Flow-Through High Speed Differential Receiver

FIN1048 3.3V LVDS 4-Bit Flow-Through High Speed Differential Receiver

This quad receiver is designed for high speed interconnect utilizing Low Voltage Differential Signaling LVDS technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock and data.

The FIN1048 can be paired with its companion driver, the FIN1047, or any other LVDS driver.
s Greater than 400Mbs data rate s Flow-through pinout simplifies PCB layout s 3.3V power supply operation s 0.4ns maximum differential pulse skew s 2.5ns maximum propagation delay s Low power dissipation s Power-Off protection s Fail safe protection for open-circuit, shorted and termi-
nated conditions s Meets or exceeds the TIA/EIA-644 LVDS standard s Pin compatible with equivalent RS-422 and LVPECL
devices s 16-Lead SOIC and TSSOP packages save space
Ordering Code:

Order Number Package Number

Package Description

FIN1048M

M16A
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow

FIN1048MTC

MTC16
16-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Pin Descriptions

Pin Name

ROUT1, ROUT2, ROUT3, ROUT4 LVTTL Data Outputs

RIN1+, RIN2+, RIN3+, RIN4+ Non-Inverting LVDS Inputs

RIN1−, RIN2−, RIN3−, RIN4− Inverting LVDS Inputs

Driver Enable Pin

EN VCC GND

Inverting Driver Enable Pin Power Supply Ground

Function Table

Inputs

Outputs

RIN+

ROUT−

ROUT

L or Open H

L or Open L

L or Open Fail Safe Condition H

L or Open

H = HIGH Logic Level L = LOW Logic Level X = Don’t Care

Z = High Impedance

Fail Safe = Open, Shorted, Terminated
2003 Fairchild Semiconductor Corporation DS500588

FIN1048

Absolute Maximum Ratings Note 1

Supply Voltage VCC DC Input Voltage VIN DC Input Voltage VOUT DC Output Current IO Storage Temperature Range TSTG Max Junction Temperature TJ Lead Temperature TL

Soldering, 10 seconds

ESD Human Body Model

ESD Machine Model
−0.5V to +4.6V −0.5V to +4.6V
−0.5V to 6V 16 mA
−65°C to +150°C 150°C
260°C 10,000V
450V

Recommended Operating Conditions

Supply Voltage VCC Magnitude of Differential Voltage
3.0V to 3.6V
|VID|
100mV to VCC

Common-Mode Input Voltage VIC

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Datasheet ID: FIN1048M 514671