FDV303N

FDV303N Datasheet

FDV303N Digital FET, N-Channel

Part	Datasheet
FDV303N	FDV303N (pdf)

Related Parts	Information
FDV303N_NB9U008	FDV303N_NB9U008

PDF Datasheet Preview
FDV303N Digital FET, N-Channel These N-Channel enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize on-state resistance at low gate drive conditions. This device is designed especially for application in battery circuits using either one lithium or three cadmium or NMH cells. It can be used as an inverter or for high-efficiency miniature discrete DC/DC conversion in compact portable electronic devices like cellular phones and pagers. This device has excellent on-state resistance even at gate drive voltages as low as volts. July 2014 Features 25 V, A continuous, 2 A Peak. RDS ON = VGS = V RDS ON = VGS= V. Very low level gate drive requirements allowing direct operation in 3V circuits. VGS th < 1V. Gate-Source Zener for ESD ruggedness.>6kV Human Body Model Compact industry standard SOT-23 surface mount package. Alternative to TN0200T and TN0201T. SOT-23 Mark:303 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOT-223 SOIC-16 Absolute Maximum Ratings TA = 25oC unless other wise noted Symbol Parameter VDSS Drain-Source Voltage, Power Supply Voltage VGSS Gate-Source Voltage, VIN Drain/Output Current - Continuous - Pulsed PD TJ,TSTG ESD Maximum Power Dissipation Operating and Storage Temperature Range Electrostatic Discharge Rating MIL-STD-883D Human Body Model 100pf / 1500 Ohm THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient 1997 Fairchild Semiconductor Corporation FDV303N 25 8 2 -55 to 150 Units V A W °C kV °C/W Electrical Characteristics TA = 25 OC unless otherwise noted Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS IDSS Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Zero Gate Voltage Drain Current IGSS Gate - Body Leakage Current ON CHARACTERISTICS Note

PDF Datasheet Preview

FDV303N Digital FET, N-Channel

These N-Channel enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize on-state resistance at low gate drive conditions. This device is designed especially for application in battery circuits using either one lithium or three cadmium or NMH cells. It can be used as an inverter or for high-efficiency miniature discrete DC/DC conversion in compact portable electronic devices like cellular phones and pagers. This device has excellent on-state resistance even at gate drive voltages as low as volts.

July 2014

Features 25 V, A continuous, 2 A Peak. RDS ON = VGS = V RDS ON = VGS= V. Very low level gate drive requirements allowing direct operation in 3V circuits. VGS th < 1V. Gate-Source Zener for ESD ruggedness.>6kV Human Body Model Compact industry standard SOT-23 surface mount package. Alternative to TN0200T and TN0201T.

SOT-23 Mark:303

SuperSOTTM-6

SuperSOTTM-8

SO-8

SOT-223

SOIC-16

Absolute Maximum Ratings TA = 25oC unless other wise noted

Symbol Parameter

VDSS

Drain-Source Voltage, Power Supply Voltage

VGSS

Gate-Source Voltage, VIN

Drain/Output Current - Continuous
- Pulsed

PD TJ,TSTG ESD

Maximum Power Dissipation

Operating and Storage Temperature Range

Electrostatic Discharge Rating MIL-STD-883D Human Body Model 100pf / 1500 Ohm

THERMAL CHARACTERISTICS

Thermal Resistance, Junction-to-Ambient
1997 Fairchild Semiconductor Corporation

FDV303N 25 8 2
-55 to 150

Units V A

W °C kV
°C/W

Electrical Characteristics TA = 25 OC unless otherwise noted

Symbol Parameter

Conditions

Min Typ Max Units

OFF CHARACTERISTICS

BVDSS

IDSS

Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Zero Gate Voltage Drain Current

IGSS

Gate - Body Leakage Current

ON CHARACTERISTICS Note

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Datasheet ID: FDV303N 514399