FDS8926A

FDS8926A Datasheet

FDS8926A Dual N-Channel Enhancement Mode Field Effect Transistor

Part	Datasheet
FDS8926A	FDS8926A (pdf)

PDF Datasheet Preview
February 1998 FDS8926A Dual N-Channel Enhancement Mode Field Effect Transistor SO-8 N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to provide superior switching performance and minimize on-state resistance. These devices are particularly suited for low voltage applications such as disk drive motor control, battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. A, 30 V. RDS ON = VGS = V RDS ON = VGS = V. High density cell design for extremely low RDS ON . Combines low gate threshold fully enhanced at 2.5V with high breakdown voltage of 30 V. High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package. SOT-23 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOT-223 D2 D1 F8D9S26A SO-8 pin 1 G1 S1 Absolute Maximum Ratings TA = 25oC unless other wise noted Symbol Parameter VDSS Drain-Source Voltage VGSS Gate-Source Voltage Drain Current - Continuous - Pulsed Note 1a Power Dissipation for Dual Operation Power Dissipation for Single Operation Note 1a Note 1b Note 1c TJ,TSTG Operating and Storage Temperature Range THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Note 1a Thermal Resistance, Junction-to-Case Note 1 1998 Fairchild Semiconductor Corporation 5 6 7 8 FDS8926A 30 ±8 20 2 1 -55 to 150 78 40 SOIC-16 4 3 2 1 Units V A W

PDF Datasheet Preview

February 1998

FDS8926A Dual N-Channel Enhancement Mode Field Effect Transistor

SO-8 N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to provide superior switching performance and minimize on-state resistance. These devices are particularly suited for low voltage applications such as disk drive motor control, battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.

A, 30 V. RDS ON = VGS = V RDS ON = VGS = V.

High density cell design for extremely low RDS ON . Combines low gate threshold fully enhanced at 2.5V with high breakdown voltage of 30 V.

High power and current handling capability in a widely used surface mount package.

Dual MOSFET in surface mount package.

SOT-23

SuperSOTTM-6

SuperSOTTM-8

SO-8

SOT-223

D2 D1

F8D9S26A

SO-8
pin 1

G1 S1

Absolute Maximum Ratings TA = 25oC unless other wise noted

Symbol Parameter

VDSS

Drain-Source Voltage

VGSS

Gate-Source Voltage

Drain Current - Continuous
- Pulsed

Note 1a

Power Dissipation for Dual Operation

Power Dissipation for Single Operation Note 1a

Note 1b

Note 1c

TJ,TSTG Operating and Storage Temperature Range THERMAL CHARACTERISTICS

Thermal Resistance, Junction-to-Ambient Note 1a

Thermal Resistance, Junction-to-Case Note 1
1998 Fairchild Semiconductor Corporation
5 6 7 8

FDS8926A 30 ±8 20 2 1
-55 to 150
78 40

SOIC-16
4 3 2 1

Units V A W

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived FDS8926A Datasheet file may be downloaded here without warranties.

Datasheet ID: FDS8926A 514382