FAN6300SY
FAN6300SY Datasheet
FAN6300 Highly Integrated Quasi-Resonant Current Mode PWM Controller
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FAN6300SY |
FAN6300SY (pdf) |
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| FAN6300 Highly Integrated Quasi-Resonant Current Mode PWM Controller October 2008 FAN6300 Highly Integrated Quasi-Resonant Current Mode PWM Controller High-Voltage Startup Quasi-Resonant Operation Cycle-by-Cycle Current Limiting Peak-Current-Mode Control Leading-Edge Blanking Internal Minimum tOFF Internal 2ms Soft-Start Over-Power Compensation GATE Output Maximum Voltage Auto-Recovery Short-Circuit Protection FB Pin Auto-Recovery Open-Loop Protection FB Pin VDD Pin & Output Voltage DET Pin OVP Latched AC/DC NB Adapters Open-Frame SMPS The highly integrated FAN6300 PWM controller provides several features to enhance the performance of flyback converters. A built-in HV startup circuit can provide more startup current to reduce the startup time of the controller. Once the VDD voltage exceeds the turn-on threshold voltage, the HV startup function is disabled immediately to improve power consumption. An internal valley voltage detector ensures the power system operates at Quasi-Resonant operation in widerange line voltage and any load conditions and reduces switching loss to minimize switching voltage on drain of power MOSFET. To minimize standby power consumption and light-load efficiency, a proprietary green-mode function provides off-time modulation to decrease switching frequency and perform extended valley voltage switching to keep to a minimum switching voltage. FAN6300 controller also provides many protection functions. Pulse-by-pulse current limiting ensures the fixed peak current limit level, even when a short circuit occurs. Once an open-circuit failure occurs in the feedback loop, the internal protection circuit disables PWM output immediately. As long as VDD drops below the turn-off threshold voltage, controller also disables PWM output. The gate output is clamped at 18V to protect the power MOS from high gate-source voltage conditions. The minimum tOFF time limit prevents the system frequency from being too high. If the DET pin reaches OVP, internal OTP is triggered, and the power system enters latch-mode until AC power is removed. FAN6300 controller is available in 8-pin SOP and DIP packages. Ordering Information Operating Temperature Range FAN6300SY -40 to +105°C FAN6300DY -40 to +105°C Eco Status Package Packing Method Green 8-Lead, Small Out-line Package SOP 8-Lead, Dual In-line Package DIP Tape & Reel Tube For Fairchild’s definition of “green” Eco Status, please visit: FAN6300 Highly Integrated Quasi-Resonant Current Mode PWM Controller Application Diagram Figure Typical Application Internal Block Diagram Soft-Start 2ms 4.2V 2R Two Steps UVLO Latched 16V/10V/8V 500µs 30µs Timer 55ms Starter FB OLP Blanking Circuit Over-Power Compensation PWM Current Limit IDET tOFF Blanking 4µs tOFF-MIN 8µs/38µs 0.3V VDET VDET 2.5V DET OVP Valley Detector Latched 1st Valley tOFF-MIN +9µs |
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