FAN5078MPX

FAN5078MPX Datasheet

FAN5078 DDR/ACPI Regulator Combo

Part	Datasheet
FAN5078MPX	FAN5078MPX (pdf)

PDF Datasheet Preview
FAN5078 DDR/ACPI Regulator Combo May 2006 FAN5078 DDR/ACPI Regulator Combo PWM regulator for VDDQ 2.5V or Linear LDO regulator generates VTT = VDDQ/2, 1.5A Peak sink/source capability AMT / M-state support Control to generate 5V USB ACPI drive and control for 5V DUAL generation 3.3V internal LDO for 3V-ALW generation 300 kHz fixed frequency switching RDS ON current sensing or optional current sense resistor for precision over-current detect Internal synchronous boot diode Common Power Good signal for all voltages Input under-voltage lockout UVLO Thermal shutdown Latched multi-fault protection Precision reference output for ULDO controllers 24-pin 5 x 5 MLP package Applications DDR VDDQ and VTT voltage generation with ACPI support Desktop PC's Servers The FAN5078 DDR memory regulator combines a highefficiency Pulse-Width Modulated PWM controller to generate the memory supply voltage, VDDQ, and a linear regulator to generate termination voltage VTT . Synchronous rectification provides high efficiency over a wide range of load currents. Efficiency is further enhanced by using the low-side MOSFET’s RDS ON to sense current. The VDDQ PWM regulator is a sampled current mode control with external compensation to achieve fast load-transient response and provide system design optimization. The VTT regulator derives its reference and takes its power from the VDDQ PWM regulator, output. The VTT termination regulator is capable of sourcing or sinking 1.5A peak currents. In S5 M1 mode, the VDDQ switcher, VTT regulator, and the 3.3V regulators remain on. S3 mode keeps these regulators on, but also turns on an external P-Channel to provide 5V USB. A single soft-start capacitor enables controlled slew rates for both VDDQ and 3.3V-ALW outputs. PGOOD becomes true in S0 only after all regulators have achieved stable outputs. In S5 EN = 0 , the 3.3V internal LDO stays on while the other regulators are powered down. Ordering Information FAN5078MPX Temperature Range -10°C to 85°C Package MLP-24 5x5mm Packing Tape and Reel FAN5078 DDR/ACPI Regulator Combo Block Diagrams +5MAIN R4 +12V S3#O +5VSB 5V USB C14 C15 Q6 MAIN SBSW 3 SBUSB# 1 S3#O 16 EN 18 S3#I 17 ALW 15 PGOOD 13 ACPI CONTROL & LOGIC +5VSB C4 VCC 14 ILIM VTT LDO +5VSB +5MAIN C13 Q3 S3#O 4 5V MAIN 2 S4ST# 5V DUAL 8 BOOT 9 HDRV 10 SW 11 ISNS R3 L1 VDDQ COUT 12 LDRV P1 GND

PDF Datasheet Preview

FAN5078 DDR/ACPI Regulator Combo

May 2006

FAN5078 DDR/ACPI Regulator Combo

PWM regulator for VDDQ 2.5V or Linear LDO regulator generates VTT = VDDQ/2,
1.5A Peak sink/source capability

AMT / M-state support Control to generate 5V USB ACPI drive and control for 5V DUAL generation 3.3V internal LDO for 3V-ALW generation 300 kHz fixed frequency switching RDS ON current sensing or optional current sense resistor
for precision over-current detect

Internal synchronous boot diode Common Power Good signal for all voltages Input under-voltage lockout UVLO Thermal shutdown Latched multi-fault protection Precision reference output for ULDO controllers 24-pin 5 x 5 MLP package

Applications DDR VDDQ and VTT voltage generation with ACPI
support

Desktop PC's Servers

The FAN5078 DDR memory regulator combines a highefficiency Pulse-Width Modulated PWM controller to generate the memory supply voltage, VDDQ, and a linear regulator to generate termination voltage VTT .

Synchronous rectification provides high efficiency over a wide range of load currents. Efficiency is further enhanced by using the low-side MOSFET’s RDS ON to sense current.

The VDDQ PWM regulator is a sampled current mode control with external compensation to achieve fast load-transient response and provide system design optimization.

The VTT regulator derives its reference and takes its power from the VDDQ PWM regulator, output. The VTT termination regulator is capable of sourcing or sinking 1.5A peak currents.

In S5 M1 mode, the VDDQ switcher, VTT regulator, and the 3.3V regulators remain on. S3 mode keeps these regulators on, but also turns on an external P-Channel to provide 5V USB.

A single soft-start capacitor enables controlled slew rates for both VDDQ and 3.3V-ALW outputs.

PGOOD becomes true in S0 only after all regulators have achieved stable outputs.

In S5 EN = 0 , the 3.3V internal LDO stays on while the other regulators are powered down.
Ordering Information

FAN5078MPX

Temperature Range
-10°C to 85°C

Package

MLP-24 5x5mm

Packing

Tape and Reel

FAN5078 DDR/ACPI Regulator Combo

Block Diagrams
+5MAIN

R4 +12V

S3#O
+5VSB
5V USB

C14 C15

Q6 MAIN

SBSW 3

SBUSB# 1

S3#O 16

EN 18

S3#I 17

ALW 15

PGOOD 13

ACPI CONTROL
& LOGIC
+5VSB C4

VCC 14

ILIM

VTT LDO
+5VSB
+5MAIN

C13 Q3 S3#O
4 5V MAIN 2 S4ST#
5V DUAL
8 BOOT
9 HDRV 10 SW 11 ISNS R3

L1 VDDQ

COUT
12 LDRV

P1 GND

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived FAN5078MPX Datasheet file may be downloaded here without warranties.

Datasheet ID: FAN5078MPX 513912