FAN5078D3MPX
FAN5078D3MPX Datasheet
FAN5078D3 Complete ACPI Compliant Power Solution for DDR3 Memory System
| Part | Datasheet |
|---|---|
FAN5078D3MPX |
FAN5078D3MPX (pdf) |
| PDF Datasheet Preview |
|---|
| FAN5078D3 Complete ACPI Compliant Power Solution for DDR3 Memory System February 2008 FAN5078D3 Complete ACPI Compliant Power Solution for DDR3 Memory System Features PWM regulator for VDDQ Linear LDO regulator generates VTT = VDDQ/2, 1.5A peak sink/source capability AMT / M-state support Control to generate 5V USB ACPI drive and control for 5V DUAL generation 3.3V internal LDO for 3V-ALW generation 300kHz fixed-frequency switching RDS ON current sensing or optional current-sense resistor for precision over-current detect Internal synchronous boot diode Common Power-Good signal for all voltages Input under-voltage lockout UVLO Thermal shutdown Latched multi-fault protection Precision reference output for ULDO controllers 24-pin 5x5mm MLP package Applications DDR VDDQ and VTT voltage generation with ACPI support for DDR3 Memory Power Solutions for Desktop PCs Memory Power Solutions for Servers The FAN5078D3 DDR memory regulator combines a highefficiency Pulse-Width Modulated PWM controller to generate the memory supply voltage, VDDQ, and a linear regulator to generate termination voltage VTT . FAN5078D3 can be configured to provide VDDQ and VTT power requirements for DDR3 version. For power requirements of DDR1 and DDR2 memory systems, refer to FAN5078. Synchronous rectification provides high efficiency over a wide range of load currents. Efficiency is further enhanced by using the low-side MOSFET’s RDS ON to sense current. The VDDQ PWM regulator is a sampled, current-mode control with external compensation to achieve fast loadtransient response and provide system design optimization. The VTT regulator derives its reference and takes its power from the VDDQ PWM regulator output. The VTT termination regulator is capable of sourcing or sinking up to 1.5A peak currents. In S5 M1 mode, the VDDQ switcher, VTT regulator, and the 3.3V regulators remain on. S3 mode keeps these regulators on and turns on an external P-channel to provide 5V USB. A single soft-start capacitor enables controlled slew rates for both VDDQ and 3.3V-ALW outputs. PGOOD becomes true in S0 only after all regulators have achieved stable outputs. In S5 EN = 0 , the 3.3V internal LDO stays on while the other regulators are powered down. Related Resources Application Note AN-6005 Synchronous Buck MOSFET Loss Calculations with Excel Model Application Note AN-6006 FAN5068/FAN5078D3 Components Calculations and Simulation Tools Ordering Information Part Number FAN5078D3MPX Temperature Range Package -10°C to +85°C 24-Lead, 5x5mm, Molded Leadless Package MLP All packages are lead free per JEDEC J-STD-020B standard. Packing Tape and Reel FAN5078D3 Complete ACPI Compliant Power Solution for DDR3 Memory System Block Diagrams +5MAIN R4 +12V S3#O +5VSB 5V USB C14 C15 Q6 MAIN SBSW 3 SBUSB# 1 S3#O 16 EN 18 S3#I 17 ALW 15 PGOOD 13 ACPI CONTROL & LOGIC +5VSB C4 VCC 14 ILIM VTT LDO +5VSB +5MAIN C13 S3#O Q3 4 5V MAIN 2 S4ST# 5V DUAL 8 BOOT 9 HDRV 10 SW 11 ISNS R3 L1 VDDQ COUT 12 LDRV P1 GND |
| More datasheets: AT45DB081D-SSU | AT45DB081D-SU-2.5 | AT45DB081D-SSU-2.5 | AT45DB081D-SU-SL954 | AT45DB081D-SSU-SL954 | AT45DB081D-MU-SL954 | AT45DB081D-SU | FGPF70N30 | CR250-4 BK | DMP2033UCB9-7 |
Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived FAN5078D3MPX Datasheet file may be downloaded here without warranties.