DM81LS97AN
DM81LS97AN Datasheet
DM81LS95A<br>• DM81LS96A<br>• DM81LS97A 3-STATE Octal Buffer
| Part | Datasheet |
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DM81LS97AN |
DM81LS97AN (pdf) |
| Related Parts | Information |
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DM81LS95AN |
DM81LS95AN |
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DM81LS96AN |
DM81LS96AN |
| PDF Datasheet Preview |
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| DM81LS95A • DM81LS96A • DM81LS97A 3-STATE Octal Buffer DM81LS95A • DM81LS96A • DM81LS97A 3-STATE Octal Buffer These devices provide eight, two-input buffers in each package. All employ low-power-Schottky TTL technology. One of the two inputs to each buffer is used as a control line to gate the output into the high-impedance state, while the other input passes the data through the buffer. The DM81LS95A and DM81LS97A present true data at the outputs, while the DM81LS96A is inverting. On the DM81LS95A and DM81LS96A versions, all eight 3-STATE enable lines are common, with access through a 2-input NOR gate. On the DM81LS97A version, four buffers are enabled from one common line, and the other four buffers are enabled form another common line. In all cases the outputs are placed in the 3-STATE condition by applying a high logic level to the enable pins. s Typical power dissipation DM81LS95A, DM81LS97A 80 mW DM81LS96A s Typical propagation delay 65 mW DM81LS95A, DM81LS97A 15 ns DM81LS96A 10 ns s Low power-Schottky, 3-STATE technology Ordering Code: Order Number Package Number Package Description DM81LS95AWM M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide DM81LS95AN N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide DM81LS96AWM M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide DM81LS96AN N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide DM81LS97AN N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions DM81LS95A and DM92LS96A Pin Names Descriptions Inputs Outputs Active LOW Output Enables Note 1 Note 1 Both G1 and G2 must be LOW for outputs to be enabled. DM81LS97A Pin Names Descriptions Inputs Outputs Active LOW Output Enable Active LOW Output Enable 1999 Fairchild Semiconductor Corporation DS006435 DM81LS95A • DM81LS96A • DM81LS97A Logic Symbols DM81LS95A DM81LS96A DM81LS97A Truth Tables DM81LS95A Inputs Output Y Hi-Z Hi-Z DM81LS96A Inputs Output Y Hi-Z Hi-Z DM81LS97A Inputs Output Hi-Z H L Hi-Z H L DM81LS95A • DM81LS96A • DM81LS97A Absolute Maximum Ratings Note 2 Supply Voltage Input Voltage Operating Free Air Temperature Range 0°C to +70°C |
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