DM74LS393M

DM74LS393M Datasheet

DM74LS393 Dual 4-Bit Binary Counter

Part	Datasheet
DM74LS393M	DM74LS393M (pdf)

Related Parts	Information
DM74LS393N	DM74LS393N

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DM74LS393 Dual 4-Bit Binary Counter DM74LS393 Dual 4-Bit Binary Counter Each of these monolithic circuits contains eight masterslave flip-flops and additional gating to implement two individual four-bit counters in a single package. The DM74LS393 comprises two independent four-bit binary counters each having a clear and a clock input. N-bit binary counters can be implemented with each package providing the capability of divide-by-256. The DM74LS393 has parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system-timing signals. s Dual version of the popular DM74LS93 s DM74LS393 dual 4-bit binary counter with individual clocks s Direct clear for each 4-bit counter s Dual 4-bit versions can significantly improve system densities by reducing counter package count by 50% s Typical maximum count frequency 35 MHz s Buffered outputs reduce possibility of collector commu- tation Ordering Code: Order Number Package Number Package Description DM74LS393M M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow DM74LS393N N14A 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Counter Sequence Each Counter Outputs Count H = HIGH Logic Level L = LOW Logic Level 2002 Fairchild Semiconductor Corporation DS006434 DM74LS393 Logic Diagram DM74LS393 Absolute Maximum Ratings Note 1 Supply Voltage Input Voltage Clear 5.5V Operating Free Air Temperature Range 0°C to +70°C Storage Temperature Range −65°C to +150°C Note 1 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions Parameter Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current fCLK Clock Frequency Note 2 fCLK Clock Frequency Note 3 Pulse Width Note 5 Clear HIGH tREL Clear Release Time Note 4 Note 5 Free Air Operating Temperature Note 2 CL = 15 pF, RL = 2 TA = 25°C and VCC = 5V. Note 3 CL = 50 pF, RL = 2 TA = 25°C and VCC = 5V. Note 4 The symbol indicates that the falling edge of the clear pulse is used for reference. Note 5 TA = 25°C, and VCC = 5V. Nom 5

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DM74LS393 Dual 4-Bit Binary Counter

DM74LS393 Dual 4-Bit Binary Counter

Each of these monolithic circuits contains eight masterslave flip-flops and additional gating to implement two individual four-bit counters in a single package. The DM74LS393 comprises two independent four-bit binary counters each having a clear and a clock input. N-bit binary counters can be implemented with each package providing the capability of divide-by-256. The DM74LS393 has parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system-timing signals.
s Dual version of the popular DM74LS93 s DM74LS393 dual 4-bit binary counter with individual
clocks s Direct clear for each 4-bit counter s Dual 4-bit versions can significantly improve system
densities by reducing counter package count by 50% s Typical maximum count frequency 35 MHz s Buffered outputs reduce possibility of collector commu-
tation
Ordering Code:

Order Number Package Number

Package Description

DM74LS393M

M14A
14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow

DM74LS393N

N14A
14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Function Table

Counter Sequence Each Counter

Outputs

Count

H = HIGH Logic Level L = LOW Logic Level
2002 Fairchild Semiconductor Corporation DS006434

DM74LS393

Logic Diagram

DM74LS393

Absolute Maximum Ratings Note 1

Supply Voltage

Input Voltage

Clear
5.5V

Operating Free Air Temperature Range 0°C to +70°C

Storage Temperature Range
−65°C to +150°C

Note 1 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.

Recommended Operating Conditions

Parameter

Supply Voltage

HIGH Level Input Voltage

LOW Level Input Voltage

HIGH Level Output Current

LOW Level Output Current
fCLK

Clock Frequency Note 2
fCLK

Clock Frequency Note 3

Pulse Width Note 5

Clear HIGH
tREL

Clear Release Time Note 4 Note 5

Free Air Operating Temperature

Note 2 CL = 15 pF, RL = 2 TA = 25°C and VCC = 5V.

Note 3 CL = 50 pF, RL = 2 TA = 25°C and VCC = 5V.

Note 4 The symbol indicates that the falling edge of the clear pulse is used for reference.

Note 5 TA = 25°C, and VCC = 5V.

Nom 5

More datasheets: C08G12 | C08G20 | C14G8I | C08G6 | C08G8 | C08G4 | C08G25 | C08G0.5 | FDS4410 | DM74LS393N

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Datasheet ID: DM74LS393M 513801