DM74LS125AM

DM74LS125AM Datasheet

DM74LS125A Quad 3-STATE Buffer

Part	Datasheet
DM74LS125AM	DM74LS125AM (pdf)

Related Parts	Information
DM74LS125AN	DM74LS125AN

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DM74LS125A Quad 3-STATE Buffer DM74LS125A Quad 3-STATE Buffer This device contains four independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors. When disabled, both the output transistors are turned off presenting a high-impedance state to the bus line. Thus the output will act neither as a significant load nor as a driver. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the disable time is shorter than the enable time of the outputs. Ordering Code: Order Number Package Number Package Description DM74LS125AM M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, Narrow DM74LS125ASJ M14D 14-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide DM74LS125AN N14A 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Inputs H = HIGH Logic Level L = LOW Logic Level X = Either LOW or HIGH Logic Level Hi-Z = 3-STATE Outputs are disabled Output Y L H Hi-Z 2000 Fairchild Semiconductor Corporation DS006387 DM74LS125A Absolute Maximum Ratings Note 1 Supply Voltage Input Voltage Operating Free Air Temperature Range 0°C to +70°C Storage Temperature Range −65°C to +150°C Note 1 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions VCC VIH VIL IOH IOL TA Parameter Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Free Air Operating Temperature Electrical Characteristics over recommended operating free air temperature range unless otherwise noted Parameter Conditions Input Clamp Voltage VCC = Min, II = −18 mA HIGH Level Output Voltage VCC = Min, IOH = Max VIL = Max, VIH = Min LOW Level VCC = Min, IOL = Max Output Voltage VIL = Max IOL = 12 mA, VCC = Min Input Current Max Input Voltage VCC = Max, VI = 7V HIGH Level Input Current VCC = Max, VI = 2.7V LOW Level Input Current VCC = Max, VI = 0.4V IOZH

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DM74LS125A Quad 3-STATE Buffer

DM74LS125A

Quad 3-STATE Buffer

This device contains four independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors. When disabled, both the output transistors are turned off presenting a high-impedance state to the bus line. Thus the output will act neither as a significant load nor as a driver. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the disable time is shorter than the enable time of the outputs.
Ordering Code:

Order Number Package Number

Package Description

DM74LS125AM

M14A
14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, Narrow

DM74LS125ASJ

M14D
14-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide

DM74LS125AN

N14A
14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Function Table

Inputs

H = HIGH Logic Level L = LOW Logic Level X = Either LOW or HIGH Logic Level Hi-Z = 3-STATE Outputs are disabled

Output Y L H

Hi-Z
2000 Fairchild Semiconductor Corporation DS006387

DM74LS125A

Absolute Maximum Ratings Note 1

Supply Voltage

Input Voltage

Operating Free Air Temperature Range 0°C to +70°C

Storage Temperature Range
−65°C to +150°C

Note 1 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.

Recommended Operating Conditions

VCC VIH VIL IOH IOL TA

Parameter Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Free Air Operating Temperature

Electrical Characteristics
over recommended operating free air temperature range unless otherwise noted

Parameter

Conditions

Input Clamp Voltage

VCC = Min, II = −18 mA

HIGH Level

Output Voltage

VCC = Min, IOH = Max

VIL = Max, VIH = Min

LOW Level

VCC = Min, IOL = Max

Output Voltage

VIL = Max

IOL = 12 mA, VCC = Min

Input Current Max Input Voltage

VCC = Max, VI = 7V

HIGH Level Input Current

VCC = Max, VI = 2.7V

LOW Level Input Current

VCC = Max, VI = 0.4V

IOZH

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Datasheet ID: DM74LS125AM 513759