DM74ALS534WMX

DM74ALS534WMX Datasheet


DM74ALS534 Octal D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs

Part Datasheet
DM74ALS534WMX DM74ALS534WMX DM74ALS534WMX (pdf)
Related Parts Information
DM74ALS534N DM74ALS534N DM74ALS534N
DM74ALS534WM DM74ALS534WM DM74ALS534WM
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DM74ALS534 Octal D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs

DM74ALS534 Octal D-Type Edge-Triggered Flip-Flop with 3-STATE Outputs

These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the DM74ALS534 are edge-triggered inverting D-type flip-flops. On the positive transition of the clock, the Q outputs will be set to the complement of the logic states that were set up at the D inputs.

A buffered output control input can be used to place the eight outputs in either a normal logic state HIGH or LOW logic levels or a high-impedance state. In the high-impedance state the outputs neither load nor drive the bus lines significantly.

The output control does not affect the internal operation of the flip-flops. That is, the old data can be retained or new data can be entered even while the outputs are off.
s Switching specifications at 50 pF s Switching specifications guaranteed over full tempera-
ture and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL
process s 3-STATE buffer-type outputs drive bus lines directly
Ordering Code:

Order Number Package Number

Package Description

DM74ALS534WM

M20B
20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide

DM74ALS534N

N20A
20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram
2000 Fairchild Semiconductor Corporation DS006223

DM74ALS534

Function Table

Output Control

Clock

L = LOW State H = HIGH State X = Don’t Care = Positive Edge Transition Z = High Impedance State Q0 = Previous Condition of Q

Output

Logic Diagram

DM74ALS534

Absolute Maximum Ratings Note 1

Supply Voltage Input Voltage Applied to Disabled Output Operating Free Air Temperature Range Storage Temperature Range Typical

N Package M Package
7V 5.5V 0°C to +70°C −65°C to +150°C
57.0°C 76.0°C

Note 1 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.

Recommended Operating Conditions

Parameter

Supply Voltage

HIGH Level Input Voltage

LOW Level Input Voltage

HIGH Level Output Current

LOW Level Output Current
fCLOCK

Clock Frequency

Width of Clock Pulse

HIGH

Data Setup Time Note 2

Data Hold Time Note 2

Free Air Operating Temperature

Note 2 The arrow indicates the positive edge of the Clock is used for reference.

Nom 5

Max 24 35

Electrical Characteristics
over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C.

Parameter

Conditions

VIK VOH

VOL II IIH IIL IO IOZH IOZL ICC

Input Clamp Voltage HIGH Level Output Voltage
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Datasheet ID: DM74ALS534WMX 513687