DM74ALS174SJ
DM74ALS174SJ Datasheet
DM74ALS174<br>• DM74ALS175 Hex/Quad D-Type Flip-Flops with Clear
| Part | Datasheet |
|---|---|
DM74ALS174SJ |
DM74ALS174SJ (pdf) |
| Related Parts | Information |
|---|---|
DM74ALS174MX |
DM74ALS174MX |
|
DM74ALS175MX |
DM74ALS175MX |
|
DM74ALS175M |
DM74ALS175M |
DM74ALS175SJ |
DM74ALS175SJ |
DM74ALS175SJX |
DM74ALS175SJX |
|
DM74ALS174M |
DM74ALS174M |
DM74ALS174SJX |
DM74ALS174SJX |
DM74ALS175N |
DM74ALS175N |
DM74ALS174N |
DM74ALS174N |
| PDF Datasheet Preview |
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| DM74ALS174 • DM74ALS175 Hex/Quad D-Type Flip-Flops with Clear DM74ALS174 • DM74ALS175 Hex/Quad D-Type Flip-Flops with Clear These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. Both have an asynchronous clear input, and the quad DM74ALS175 version features complementary outputs from each flip-flop. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the HIGH or LOW level, the D input signal has no effect at the output. s Advanced oxide-isolated ion-implanted Schottky TTL process s Pin and functional compatible with LS family counterpart s Typical clock frequency maximum is 80 MHz s Switching performance guaranteed over full temperature and VCC supply range Ordering Code: Ordering Code Package Number Package Description DM74ALS174M M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow DM74ALS174SJ M16D 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide DM74ALS174N N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide DM74ALS175M M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow DM74ALS175SJ M16D 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide DM74ALS175N N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams DM74ALS174 DM74ALS175 2000 Fairchild Semiconductor Corporation DS006112 DM74ALS174 • DM74ALS175 Function Table Inputs Clear Clock H = HIGH Level steady state L = LOW Level steady state X = Don’t Care = Transition from LOW-to-HIGH Level Q0 = the level of Q before the indicated steady-state input conditions were established Note 1 applies to DM74ALS175 only Logic Diagrams DM74ALS174 Outputs Q Note 1 DM74ALS175 DM74ALS174 • DM74ALS175 Absolute Maximum Ratings Note 2 Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Typical N Package M Package 7V 0°C to +70°C −65°C to +150°C 77.9°C/W 107.3°C/W Note 2 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions Parameter Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Pulse Width Clock 10 HIGH or LOW Clear LOW tSETUP Setup Time Note 3 Data Input Clear Inactive State tHOLD |
| More datasheets: EL354-V | EL354(TB)-V | EL354(TA) | EVAL-AD9830EBZ | RER101-36/12N/2HHPR-181 | DM74ALS174MX | DM74ALS175MX | DM74ALS175M | DM74ALS175SJ | DM74ALS175SJX |
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