DM74ALS125MX

DM74ALS125MX Datasheet

DM74ALS125 Quad 3-STATE Buffer

Part	Datasheet
DM74ALS125MX	DM74ALS125MX (pdf)

Related Parts	Information
DM74ALS125N	DM74ALS125N
DM74ALS125M	DM74ALS125M

PDF Datasheet Preview
DM74ALS125 Quad 3-STATE Buffer DM74ALS125 Quad 3-STATE Buffer This device contains four independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. The 3-STATE circuitry contains a feature that maintains the buffer outputs in 3-STATE high impedance state during power supply ramp-up or rampdown. This eliminates bus glitching problems that arise during power-up and power-down. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the disable time is shorter than the enable time of the outputs. s Advanced low power oxide-isolated ion-implanted Schottky TTL process s Functional and pin compatible with the 74LS counterpart s Switching response specified into and 50 pF load s Switching response specifications guaranteed over full temperature and VCC supply range s PNP input design reduces input loading s Low level drive current 74ALS = 24 mA Ordering Code: Order Number Package Number Package Description DM74ALS125M M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow DM74ALS125N N14A 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Logic Diagram Functional Table Input H = HIGH Logic Level L = LOW Logic Level X = Either LOW or HIGH Logic Level Hi-Z = 3-STATE Outputs are disabled Output Y L H Hi-Z 2000 Fairchild Semiconductor Corporation DS010620 DM74ALS125 Absolute Maximum Ratings Note 1 Supply Voltage, VCC Input Voltage Voltage Applied to Disabled Output 5.5V Operating Free Air Temperature Range 0 to +70°C Storage Temperature Range −65°C to +150°C Typical N Package 78.0°C/W M Package 111.0°C/W Note 1 The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions Parameter Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Operating Free-Air Temperature Electrical Characteristics over recommended operating free air temperature unless otherwise specified Parameter Conditions Input Clamp Voltage HIGH Level Output Voltage LOW Level Output Voltage

PDF Datasheet Preview

DM74ALS125 Quad 3-STATE Buffer

DM74ALS125 Quad 3-STATE Buffer

This device contains four independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. The 3-STATE circuitry contains a feature that maintains the buffer outputs in 3-STATE high impedance state during power supply ramp-up or rampdown. This eliminates bus glitching problems that arise during power-up and power-down. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the disable time is shorter than the enable time of the outputs.
s Advanced low power oxide-isolated ion-implanted Schottky TTL process
s Functional and pin compatible with the 74LS counterpart s Switching response specified into and 50 pF load s Switching response specifications guaranteed over full
temperature and VCC supply range s PNP input design reduces input loading s Low level drive current 74ALS = 24 mA
Ordering Code:

Order Number Package Number

Package Description

DM74ALS125M

M14A
14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow

DM74ALS125N

N14A
14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Logic Diagram

Functional Table

Input

H = HIGH Logic Level L = LOW Logic Level X = Either LOW or HIGH Logic Level Hi-Z = 3-STATE Outputs are disabled

Output Y L H

Hi-Z
2000 Fairchild Semiconductor Corporation DS010620

DM74ALS125

Absolute Maximum Ratings Note 1

Supply Voltage, VCC

Input Voltage

Voltage Applied to Disabled Output
5.5V

Operating Free Air Temperature Range
0 to +70°C

Storage Temperature Range
−65°C to +150°C

Typical N Package
78.0°C/W

M Package
111.0°C/W

Note 1 The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.

Recommended Operating Conditions

Parameter

Supply Voltage

HIGH Level Input Voltage

LOW Level Input Voltage

HIGH Level Output Current

LOW Level Output Current

Operating Free-Air Temperature

Electrical Characteristics
over recommended operating free air temperature unless otherwise specified

Parameter

Conditions

Input Clamp Voltage

HIGH Level

Output Voltage

LOW Level

Output Voltage

More datasheets: 1803369 | 1800469 | 1800369 | 162C18709X | 132A15019X | 3553 | B000002 | 1802 | DM74ALS125N | DM74ALS125M

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived DM74ALS125MX Datasheet file may be downloaded here without warranties.

Datasheet ID: DM74ALS125MX 513650