CD4047BC Low Power Monostable/Astable Multivibrator
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CD4047BCM (pdf) |
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CD4047BCMX |
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CD4047BCN |
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CD4047BC Low Power Monostable/Astable Multivibrator CD4047BC Low Power Monostable/Astable Multivibrator The CD4047B is capable of operating in either the monostable or astable mode. It requires an external capacitor between pins 1 and 3 and an external resistor between pins 2 and 3 to determine the output pulse width in the monostable mode, and the output frequency in the astable mode. Astable operation is enabled by a high level on the astable input or low level on the astable input. The output frequency at 50% duty cycle at Q and Q outputs is determined by the timing components. A frequency twice that of Q is available at the Oscillator Output a 50% duty cycle is not guaranteed. Monostable operation is obtained when the device is triggered by LOW-to-HIGH transition at + trigger input or HIGH-to-LOW transition at − trigger input. The device can be retriggered by applying a simultaneous LOW-to-HIGH transition to both the + trigger and retrigger inputs. A high level on Reset input resets the outputs Q to LOW, Q to HIGH. s Wide supply voltage range 3.0V to 15V s High noise immunity VDD typ. s Low power TTL compatibility Fan out of 2 driving 74L or 1 driving 74LS Special Features s Low power consumption special CMOS oscillator configuration s Monostable one-shot or astable free-running operation s True and complemented buffered outputs s Only one external R and C required Monostable Multivibrator Features s Positive- or negative-edge trigger s Output pulse width independent of trigger pulse duration s Retriggerable option for pulse width expansion s Long pulse widths possible using small RC components by means of external counter provision s Fast recovery time essentially independent of pulse width s Pulse-width accuracy maintained at duty cycles approaching 100% Astable Multivibrator Features s Free-running or gatable operating modes s 50% duty cycle s Oscillator output available s Good astable frequency stability typical= ±2% + 0.03%/°C 100 kHz frequency= + 0.015%/°C 10 kHz deviation circuits trimmed to frequency VDD = 10V ±10% • Frequency discriminators • Timing circuits • Time-delay applications • Envelope detection • Frequency multiplication • Frequency division Ordering Code: Order Number Package Number Package Description CD4047BCM M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow CD4047BCN N14A 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. 2002 Fairchild Semiconductor Corporation DS005969 CD4047BC Connection Diagram Pin Assignments for SOIC and DIP Top View Function Table Terminal Connections Function To VDD To VSS Input Pulse Astable Multivibrator Free-Running 4, 5, 6, 14 7, 8, 9, 12 True Gating 4, 6, 14 7, 8, 9, 12 Complement Gating 6, 14 5, 7, 8, 9, 12 Monostable Multivibrator Positive-Edge Trigger 4, 14 5, 6, 7, 9, 12 Negative-Edge Trigger 4, 8, 14 5, 7, 9, 12 Retriggerable 4, 14 5, 6, 7, 9 8, 12 External Countdown Note 1 5, 6, 7, 8, 9, 12 Figure 1 Note 1 External resistor between terminals 2 and External capacitor between terminals 1 and Output Pulse From Typical Output Period or Pulse Width 10, 11, 13 10, 11, 13 10, 11, 13 tA 10, 11 = RC tA 13 = RC |
More datasheets: MV8104 | MV8103 | MV8102 | 426013610-3 | 19032744A | WNC-5641 | WNC-5631 | 2340 | CD4047BCMX | CD4047BCN |
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