CD4023BCN

CD4023BCN Datasheet

CD4023BC Buffered Triple 3-Input NAND Gate

Part	Datasheet
CD4023BCN	CD4023BCN (pdf)

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CD4023BC Buffered Triple 3-Input NAND Gate CD4023BC Buffered Triple 3-Input NAND Gate These triple gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and Pchannel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered outputs which improve transfer characteristics by providing very high gain. All inputs are protected against static discharge with diodes to VDD and VSS. s Wide supply voltage range 3.0V to 15V s High noise immunity VDD typ s Low power TTL compatibility: fan out of 2 driving 74L or 1 driving 74LS s parametric ratings s Symmetrical output characteristics s Maximum input leakage 1 µA at 15V over full temperature range Ordering Code: Order Number Package Number Package Description CD4023BCM Note 1 M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow CD4023BCSJ M14D 14-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide CD4023BCN N14A 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Note 1 Devices also available in Tape and Reel. Specify by appending the suffix letter “X” tot he ordering code. Connection Diagram Block Diagram Top View 1/3 Device Shown *All Inputs Protected by Standard CMOS Input Protection Circuit. 2004 Fairchild Semiconductor Corporation DS005956 CD4023BC Absolute Maximum Ratings Note 2 Note 3 Recommended Operating Conditions DC Supply Voltage VDD Input Voltage VIN Storage Temp. Range TS Power Dissipation PD Dual-In-Line Small Outline Lead Temperature TL Soldering, 10 seconds VDC to +18 VDC to VDD+0.5 VDC −65°C to +150°C DC Supply Voltage VDD Input Voltage VIN Operating Temperature Range TA 5 VDC to 15 VDC 0 VDC to VDD VDC −55°C to +125°C 700 mW 500 mW 260°C Note 2 “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed they are not meant to imply that the devices should be operated at these limits. The table of “Recommended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation. Note 3 VSS = 0V unless otherwise specified. DC Electrical Characteristics Note 4 Parameter Conditions Quiescent Device Current VDD = 5V VDD = 10V VDD = 15V LOW Level Output Voltage VDD = 5V VDD = 10V VDD = 15V HIGH Level Output Voltage VDD = 5V VDD = 10V VDD = 15V LOW Level Input Voltage VDD=5V, VO=4.5V VDD=10V, VO=9.0V \|IO\|<1µA VDD=15V, VO=13.5V HIGH Level Input Voltage VDD=5V, VO=0.5V VDD=10V, VO=1.0V \|IO\|<1µA VDD=15V, VO=1.5V LOW Level Output Current VDD=5V, VO = 0.4V

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CD4023BC Buffered Triple 3-Input NAND Gate

CD4023BC Buffered Triple 3-Input NAND Gate

These triple gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and Pchannel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered outputs which improve transfer characteristics by providing very high gain. All inputs are protected against static discharge with diodes to VDD and VSS.
s Wide supply voltage range 3.0V to 15V s High noise immunity VDD typ s Low power TTL compatibility:
fan out of 2 driving 74L or 1 driving 74LS s parametric ratings s Symmetrical output characteristics s Maximum input leakage 1 µA at 15V over full
temperature range
Ordering Code:

Order Number Package Number

Package Description

CD4023BCM Note 1

M14A
14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow

CD4023BCSJ

M14D
14-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide

CD4023BCN

N14A
14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Note 1 Devices also available in Tape and Reel. Specify by appending the suffix letter “X” tot he ordering code.

Connection Diagram

Block Diagram

Top View
1/3 Device Shown *All Inputs Protected by Standard CMOS Input Protection Circuit.
2004 Fairchild Semiconductor Corporation DS005956

CD4023BC

Absolute Maximum Ratings Note 2

Note 3

Recommended Operating Conditions

DC Supply Voltage VDD Input Voltage VIN Storage Temp. Range TS Power Dissipation PD

Dual-In-Line

Small Outline

Lead Temperature TL Soldering, 10 seconds

VDC to +18 VDC to VDD+0.5 VDC
−65°C to +150°C

DC Supply Voltage VDD Input Voltage VIN Operating Temperature Range TA
5 VDC to 15 VDC 0 VDC to VDD VDC −55°C to +125°C
700 mW 500 mW
260°C

Note 2 “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed they are not meant to imply that the devices should be operated at these limits. The table of “Recommended Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation.

Note 3 VSS = 0V unless otherwise specified.

DC Electrical Characteristics Note 4

Parameter

Conditions

Quiescent Device Current VDD = 5V

VDD = 10V

VDD = 15V

LOW Level Output Voltage VDD = 5V

VDD = 10V

VDD = 15V

HIGH Level Output Voltage VDD = 5V

VDD = 10V

VDD = 15V

LOW Level Input Voltage VDD=5V, VO=4.5V

VDD=10V, VO=9.0V |IO|<1µA

VDD=15V, VO=13.5V

HIGH Level Input Voltage VDD=5V, VO=0.5V

VDD=10V, VO=1.0V |IO|<1µA

VDD=15V, VO=1.5V

LOW Level Output Current VDD=5V, VO = 0.4V

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Datasheet ID: CD4023BCN 513561