74VCX162827MTDX

74VCX162827MTDX Datasheet

74VCX162827 Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and Series Resistors in the Outputs

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74VCX162827MTDX	74VCX162827MTDX (pdf)

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74VCX162827MTD	74VCX162827MTD

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74VCX162827 Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and Series Resistors in the Outputs 74VCX162827 Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and Series Resistors in the Outputs The VCX162827 contains twenty non-inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/ receiver. The device is byte controlled. Each byte has NOR output enables for maximum control flexibility. The 74VCX162827 is designed for low voltage 1.4V to 3.6V VCC applications with I/O capability up to 3.6V. The VCX162827 is also designed with resistors in the outputs. The 74VCX162827 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation. s VCC supply operation s 3.6V tolerant inputs and outputs s series resistors in outputs s tPD ns max for 3.0V to 3.6V VCC s Power-off high impedance inputs and outputs s Supports live insertion and withdrawal Note 1 s Static Drive IOH/IOL ±12 mA 3.0V VCC s Uses patented noise/EMI reduction circuitry s Latch-up performance exceeds 300 mA s ESD performance: Human body model > 2000V Machine model > 200V Note 1 To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor the minimum value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74VCX162827MTD MTD56 56-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix “X” to the ordering code. Logic Symbol Pin Descriptions Pin Names Output Enable Input Active LOW Inputs Outputs 2004 Fairchild Semiconductor Corporation DS500138 74VCX162827 Connection Diagram Truth Tables Inputs Outputs Inputs Outputs H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial HIGH or LOW, inputs may not float Z = High Impedance Functional Description The 74VCX162827 contains twenty non-inverting buffers with 3-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of each other. The control pins may be shorted together to obtain full 20-bit operation. The 3-STATE outputs are controlled by Output Enable OEn inputs. When OE1, and OE2 are LOW, are in the 2-state mode. When either OE1 or OE2 are HIGH, the standard outputs are in the high impedance mode but this does not interfere with entering new data into the inputs. The same applies for byte two with OE3 and OE4. Logic Diagrams 74VCX162827 Absolute Maximum Ratings Note 2 Supply Voltage VCC DC Input Voltage VI Output Voltage VO Outputs 3-STATE Outputs Active Note 3 DC Input Diode Current IIK VI < 0V DC Output Diode Current IOK VO < 0V VO > VCC DC Output Source/Sink Current IOH/IOL DC VCC or GND Current per Supply Pin ICC or GND Storage Temperature Range TSTG −0.5V to +4.6V −0.5V to +4.6V −0.5V to +4.6V −0.5V to VCC + 0.5V −50 mA −50 mA +50 mA ±50 mA ±100 mA −65°C to +150°C Recommended Operating Conditions Note 4 Power Supply Operating 1.4V to 3.6V Input Voltage −0.3V to +3.6V Output Voltage VO Output in Active States Output in 3-STATE 0V to VCC 0.0V to 3.6V Output Current in IOH/IOL VCC = 3.0V to 3.6V VCC = 2.3V to 2.7V VCC = 1.65V to 2.3V VCC = 1.4V to 1.6V

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74VCX162827 Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and Series Resistors in the Outputs
74VCX162827

Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and Series Resistors in the Outputs

The VCX162827 contains twenty non-inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/ receiver. The device is byte controlled. Each byte has NOR output enables for maximum control flexibility.

The 74VCX162827 is designed for low voltage 1.4V to 3.6V VCC applications with I/O capability up to 3.6V. The VCX162827 is also designed with resistors in the outputs.

The 74VCX162827 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.
s VCC supply operation s 3.6V tolerant inputs and outputs s series resistors in outputs s tPD
ns max for 3.0V to 3.6V VCC s Power-off high impedance inputs and outputs s Supports live insertion and withdrawal Note 1 s Static Drive IOH/IOL
±12 mA 3.0V VCC s Uses patented noise/EMI reduction circuitry s Latch-up performance exceeds 300 mA s ESD performance:

Human body model > 2000V Machine model > 200V

Note 1 To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor the minimum value of the resistor is determined by the current-sourcing capability of the driver.
Ordering Code:

Order Number Package Number

Package Description
74VCX162827MTD

MTD56
56-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix “X” to the ordering code.

Logic Symbol

Pin Descriptions

Pin Names

Output Enable Input Active LOW Inputs Outputs
2004 Fairchild Semiconductor Corporation DS500138
74VCX162827

Connection Diagram

Truth Tables

Inputs

Outputs

Inputs

Outputs

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial HIGH or LOW, inputs may not float Z = High Impedance

Functional Description

The 74VCX162827 contains twenty non-inverting buffers with 3-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of each other. The control pins may be shorted together to obtain full 20-bit operation. The 3-STATE outputs are controlled by Output Enable OEn inputs. When OE1, and OE2 are LOW, are in the 2-state mode. When either OE1 or OE2 are HIGH, the standard outputs are in the high impedance mode but this does not interfere with entering new data into the inputs. The same applies for byte two with OE3 and OE4.

Logic Diagrams
74VCX162827

Absolute Maximum Ratings Note 2

Supply Voltage VCC DC Input Voltage VI Output Voltage VO

Outputs 3-STATE

Outputs Active Note 3

DC Input Diode Current IIK VI < 0V DC Output Diode Current IOK

VO < 0V VO > VCC DC Output Source/Sink Current

IOH/IOL DC VCC or GND Current per

Supply Pin ICC or GND Storage Temperature Range TSTG
−0.5V to +4.6V −0.5V to +4.6V
−0.5V to +4.6V −0.5V to VCC + 0.5V
−50 mA
−50 mA +50 mA
±50 mA
±100 mA −65°C to +150°C

Recommended Operating Conditions Note 4

Power Supply

Operating
1.4V to 3.6V

Input Voltage
−0.3V to +3.6V

Output Voltage VO Output in Active States Output in 3-STATE
0V to VCC 0.0V to 3.6V

Output Current in IOH/IOL VCC = 3.0V to 3.6V VCC = 2.3V to 2.7V VCC = 1.65V to 2.3V VCC = 1.4V to 1.6V

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Datasheet ID: 74VCX162827MTDX 513458