74VCX16240MTD

74VCX16240MTD Datasheet


74VCX16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs

Part Datasheet
74VCX16240MTD 74VCX16240MTD 74VCX16240MTD (pdf)
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74VCX16240MTDX 74VCX16240MTDX 74VCX16240MTDX
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74VCX16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs
74VCX16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs

The VCX16240 contains sixteen inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/ receiver. The device is nibble 4-bit controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation.

The 74VCX16240 is designed for low voltage 1.2V to 3.6V VCC applications with I/O capability up to 3.6V.

The 74VCX16240 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.
s 1.2V to 3.6V VCC supply operation s 3.6V tolerant inputs and outputs s tPD
ns max for 3.0V to 3.6V VCC s Power-off high impedance inputs and outputs s Supports live insertion and withdrawal Note 1 s Static Drive IOH/IOL
r24 mA 3.0V VCC s Uses patented noise/EMI reduction circuitry s Latch-up performance exceeds 300 mA s ESD performance:

Human body model ! 2000V Machine model ! 200V

Note 1 To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor the minimum value of the resistor is determined by the current-sourcing capability of the driver.
Ordering Code:

Order Number Package Number

Package Descriptions
74VCX16240MTD

MTD48
48-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Pin Descriptions

Pin Names

Description Output Enable Input Active LOW

Inputs Outputs
2005 Fairchild Semiconductor Corporation DS500099
74VCX16240

Connection Diagram

Truth Tables

Inputs

Outputs

Inputs

Outputs

Inputs

OE3 L H

Outputs

Functional Description

The 74VCX16240 contains sixteen inverting buffers with 3-STATE outputs. The device is nibble 4 bits controlled with each nibble functioning identically, but independent of each other. The control pins may be shorted together to obtain full 16-bit operation.The 3-STATE outputs are con-

Logic Diagram

Inputs

Outputs

H HIGH Voltage Level L LOW Voltage Level X Immaterial HIGH or LOW, inputs may not float Z High Impedance
trolled by an Output Enable OEn input. When OEn is LOW, the outputs are in the 2-state mode. When OEn is HIGH, the standard outputs are in the high impedance mode but this does not interfere with entering new data into the inputs.
74VCX16240

Absolute Maximum Ratings Note 2

Supply Voltage VCC DC Input Voltage VI Output Voltage VO

Outputs 3-STATED

Outputs Active Note 3 DC Input Diode Current IIK VI 0V DC Output Diode Current IOK

VO 0V VO ! VCC DC Output Source/Sink Current

IOH/IOL DC VCC or GND Current per

Supply Pin ICC or GND Storage Temperature Range TSTG
to VCC
r50 mA
r100 mA to

Recommended Operating Conditions Note 4

Power Supply

Operating
1.2V to 3.6V

Input Voltage

Output Voltage VO Output in Active States Output in 3-STATE
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Datasheet ID: 74VCX16240MTD 513456