74OL6000W

74OL6000W Datasheet

74OL6000 74OL6001 74OL6010 74OL6011

Part	Datasheet
74OL6000W	74OL6000W (pdf)

Related Parts	Information
74OL6000S	74OL6000S
74OL6011	74OL6011
74OL6010	74OL6010
74OL6000	74OL6000
74OL6001	74OL6001
74OL6010300W	74OL6010300W
74OL60013S	74OL60013S
74OL6001S	74OL6001S
74OL6001SD	74OL6001SD
74OL6001W	74OL6001W
74OL6010300	74OL6010300
74OL60013SD	74OL60013SD
74OL6011W	74OL6011W
74OL60103S	74OL60103S
74OL6011SD	74OL6011SD
74OL60103SD	74OL60103SD
74OL60113SD	74OL60113SD
74OL6011S	74OL6011S
74OL6010SD	74OL6010SD
74OL6011300	74OL6011300
74OL60113S	74OL60113S
74OL6001300W	74OL6001300W
74OL6010W	74OL6010W
74OL6010S	74OL6010S
74OL6000300W	74OL6000300W
74OL6001300	74OL6001300
74OL6011300W	74OL6011300W
74OL6000SD	74OL6000SD
74OL60003SD	74OL60003SD
74OL60003S	74OL60003S
74OL6000300	74OL6000300

PDF Datasheet Preview
HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS LSTTL TO PACKAGE TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER 74OL6000 74OL6001 74OL6010 74OL6011 BUFFER INVERTER OPTOLOGIC is the family of truly logic compatible optically coupled logic interface gates. The family consists of four device types offering LSTTL to TTL and LSTTL to CMOS interfacing. Each of these interfacing functions is available as a buffer A=B , or as an inverter A=B . The LSTTL input compatibility is provided by an input integrated circuit, with industry standard logic levels. This input IC switches a temperature compensated current source driving a high speed 850 nm AlGaAs LED emitter. This novel integration scheme eliminates CTR degradation over time and temperature. The emitter is optically coupled to an integrated photodetector/high-gain, high-speed output IC. The superior 15kV/µS common-mode noise rejection is ensured through the use of an optically transparent noise shield. The TTL compatible output has a totem-pole with a fan-out of The CMOS compatible output has an open collector Schottkyclamped transistor that interfaces to any CMOS logic between and 15 volts. The 74OL6010/11 may also by used to drive power MOSFETS or transistors up to 15 volts. The Optologic coupler family typically offers propagation of delays of 60 ns and can support 15 MBaud data communication. The two input chips and the output chip are assembled in a 6-pin DIP high insulation voltage plastic package. Fairchild’s proprietary construction provides a withstand test voltage of 5300 VRMS 1 minute . • Industry LSTTL to TTL and LSTTL to CMOS complete logic-to-logic optocoupler • Incorporates LED drive circuitry use as logic gate • Very high speed • Choice of buffer or inverter • Choice of TTL or CMOS compatible output up to 15 volts • Fan-out of 10 TTL loads, fan-in 1 LSTTL load • Internal noise shield very high CMR of ±15 kV/µS • UL recognized File #E90700 • Same noise immunity as LSTTL/TTL. • Transmission line interface receiver and driver • Excellent as bridged receiver in fast LAN highways • Bus interface • Logic family interface with ground loop noise elimination • High speed AC/DC voltage sensing • Driver for power semiconductor devices • Level shifting • Replaces fast pulse transformers 2003 Fairchild Semiconductor Corporation Page 1 of 15 10/1/03 HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS LSTTL TO TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER 74OL6000 74OL6001 74OL6010 74OL6011 INPUT Vcc 22 TYP. GND LSTTL INPUT CIRCUIT Vcc 150 TYP. OUTPUT All Inputs TTL OUTPUT CIRCUIT 74OL6000/01 Output PIN CONFIGURATION 1-VCCI Input VCC 2-VIN Data In 3-GND, Input GND 6-VCCO Output VCC 5-VO Data Out 4-GNDO Output GND DEVICE CONFIGURATION 74OL 6000 74OL 6001 74OL 6010 74OL 6011 Logic Compatibility Input LSTTL Output TTL CMOS Logic Function ORDERING INFORMATION Option S SD W 300 300W 3S 3SD Order Entry .S .SD .W .300W .3S .3SD MARKING INFORMATION Description Surface Mount Lead Bend Surface Mount Tape and Reel Lead Spacing VDE 0884 VDE 0884, Lead Spacing VDE 0884, Surface Mount VDE 0884, Surface Mount, Tape and Reel 74OL6000 2 V XX YY K 6 1 Fairchild logo 2 Device number VDE mark Note Only appears on parts ordered with VDE option See order entry table 4 Two digit year code, e.g., ‘03’ 5 Two digit work week ranging from ‘01’ to ‘53’ 6 Assembly package code 2003 Fairchild Semiconductor Corporation Page 12 of 15 10/1/03 HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS LSTTL TO TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER 74OL6000 74OL6001 74OL6010 74OL6011 Black Package, No Temperature °C 215°C, s 225 C peak 200 Time above 183°C, sec Ramp up = 3C/sec 0 1 2 3 4 Time Minute • Peak reflow temperature 225°C package surface temperature • Time of temperature higher than 183°C for seconds • One time soldering reflow is recommended 2003 Fairchild Semiconductor Corporation Page 13 of 15 10/1/03 HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS LSTTL TO TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER 74OL6000 74OL6001 74OL6010 74OL6011 APPLICATION

PDF Datasheet Preview

HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS

LSTTL TO

PACKAGE

TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER
74OL6000 74OL6001 74OL6010 74OL6011

BUFFER INVERTER

OPTOLOGIC is the family of truly logic compatible optically coupled logic interface gates.

The family consists of four device types offering LSTTL to TTL and LSTTL to CMOS interfacing. Each of these interfacing functions is available as a buffer A=B , or as an inverter A=B .

The LSTTL input compatibility is provided by an input integrated circuit, with industry standard logic levels. This input IC switches a temperature compensated current source driving a high speed 850 nm AlGaAs LED emitter. This novel integration scheme eliminates CTR degradation over time and temperature.

The emitter is optically coupled to an integrated photodetector/high-gain, high-speed output IC. The superior 15kV/µS common-mode noise rejection is ensured through the use of an optically transparent noise shield.

The TTL compatible output has a totem-pole with a fan-out of The CMOS compatible output has an open collector Schottkyclamped transistor that interfaces to any CMOS logic between and 15 volts. The 74OL6010/11 may also by used to drive power MOSFETS or transistors up to 15 volts.

The Optologic coupler family typically offers propagation of delays of 60 ns and can support 15 MBaud data communication.

The two input chips and the output chip are assembled in a 6-pin DIP high insulation voltage plastic package. Fairchild’s proprietary construction provides a withstand test voltage of 5300 VRMS 1 minute .
• Industry LSTTL to TTL and LSTTL to CMOS complete logic-to-logic optocoupler
• Incorporates LED drive circuitry use as logic gate
• Very high speed
• Choice of buffer or inverter
• Choice of TTL or CMOS compatible output up to 15 volts
• Fan-out of 10 TTL loads, fan-in 1 LSTTL load
• Internal noise shield very high CMR of ±15 kV/µS
• UL recognized File #E90700
• Same noise immunity as LSTTL/TTL.
• Transmission line interface receiver and driver
• Excellent as bridged receiver in fast LAN highways
• Bus interface
• Logic family interface with ground loop noise elimination
• High speed AC/DC voltage sensing
• Driver for power semiconductor devices
• Level shifting
• Replaces fast pulse transformers
2003 Fairchild Semiconductor Corporation

Page 1 of 15
10/1/03

HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS

LSTTL TO

TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER
74OL6000 74OL6001 74OL6010 74OL6011

INPUT

Vcc 22 TYP.

GND LSTTL INPUT CIRCUIT

Vcc 150 TYP.

OUTPUT

All Inputs

TTL OUTPUT CIRCUIT
74OL6000/01 Output

PIN CONFIGURATION
1-VCCI Input VCC 2-VIN Data In 3-GND, Input GND
6-VCCO Output VCC 5-VO Data Out 4-GNDO Output GND

DEVICE CONFIGURATION
74OL 6000 74OL 6001 74OL 6010 74OL 6011

Logic Compatibility

Input LSTTL

Output TTL

CMOS

Logic Function
ORDERING INFORMATION

Option S SD W 300 300W 3S 3SD

Order Entry .S .SD .W
.300W .3S .3SD

MARKING INFORMATION

Description Surface Mount Lead Bend Surface Mount Tape and Reel

Lead Spacing VDE 0884

VDE 0884, Lead Spacing VDE 0884, Surface Mount

VDE 0884, Surface Mount, Tape and Reel
74OL6000 2 V XX YY K 6
1 Fairchild logo
2 Device number

VDE mark Note Only appears on parts ordered with VDE option See order entry table
4 Two digit year code, e.g., ‘03’
5 Two digit work week ranging from ‘01’ to ‘53’
6 Assembly package code
2003 Fairchild Semiconductor Corporation

Page 12 of 15
10/1/03

HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS

LSTTL TO

TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER
74OL6000 74OL6001 74OL6010 74OL6011

Black Package, No

Temperature °C
215°C, s
225 C peak 200

Time above 183°C, sec

Ramp up = 3C/sec
0 1 2 3 4

Time Minute
• Peak reflow temperature 225°C package surface temperature
• Time of temperature higher than 183°C for seconds
• One time soldering reflow is recommended
2003 Fairchild Semiconductor Corporation

Page 13 of 15
10/1/03

HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS

LSTTL TO

TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER
74OL6000 74OL6001 74OL6010 74OL6011

APPLICATION

More datasheets: 74OL6011S | 74OL6010SD | 74OL6011300 | 74OL60113S | 74OL6001300W | 74OL6010W | 74OL6010S | 74OL6000300W | 74OL6001300 | 74OL6011300W

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Datasheet ID: 74OL6000W 513451