74LVTH652WMX

74LVTH652WMX Datasheet

74LVTH652 Low Voltage Octal Transceiver/Register with 3-STATE Outputs

Part	Datasheet
74LVTH652WMX	74LVTH652WMX (pdf)

Related Parts	Information
74LVTH652MTCX	74LVTH652MTCX
74LVTH652WM	74LVTH652WM
74LVTH652MTC	74LVTH652MTC

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74LVTH652 Low Voltage Octal Transceiver/Register with 3-STATE Outputs 74LVTH652 Low Voltage Octal Transceiver/Register with 3-STATE Outputs The LVTH652 consists of bus transceiver circuits with Dtype flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to HIGH logic level. Output Enable pins OEAB, OEBA are provided to control the transceiver function. See Functional Description . The LVTH652 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. This octal transceiver/register is designed for low-voltage 3.3V VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVTH652 is fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation. s Input and output interface capability to systems at 5V VCC s Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs s Live insertion/extraction permitted s Power Up/Down high impedance provides glitch-free bus loading s Outputs source/sink −32 mA/+64 mA s Functionally compatible with the 74 series 652 s Latch-up performance exceeds 500 mA s ESD performance: Human-body model > 2000V Machine model > 200V Charged-device model > 1000V Ordering Code: Order Number Package Number Package Description 74LVTH652WM M24B 24-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 74LVTH652MTC MTC24 24-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC 2000 Fairchild Semiconductor Corporation DS012018 74LVTH652 Pin Descriptions Pin Names CPAB, CPBA SAB, SBA OEAB, OEBA Description Data Register A Inputs/ 3-STATE Outputs Data Register B Inputs/ 3-STATE Outputs Clock Pulse Inputs Select Inputs Output Enable Inputs Connection Diagram Truth Table Note 1 Inputs OEAB OEBA CPAB CPBA SAB SBA Inputs/Outputs A0 thru A7 B0 thru B7 Operating Mode L X H L or L or L or L or L X Input Input Isolation Store A and B Data X Input Not Specified Store A, Hold B X Input Output Store A in Both Registers X Not Specified Input Hold A, Store B X Output Input Store B in Both Registers L Output Input Real-Time B Data to A Bus H or L X Store B Data to A Bus X Input

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74LVTH652 Low Voltage Octal Transceiver/Register with 3-STATE Outputs
74LVTH652 Low Voltage Octal Transceiver/Register with 3-STATE Outputs

The LVTH652 consists of bus transceiver circuits with Dtype flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to HIGH logic level. Output Enable pins OEAB, OEBA are provided to control the transceiver function. See Functional Description .

The LVTH652 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs.

This octal transceiver/register is designed for low-voltage 3.3V VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVTH652 is fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation.
s Input and output interface capability to systems at 5V VCC
s Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs
s Live insertion/extraction permitted s Power Up/Down high impedance provides glitch-free
bus loading s Outputs source/sink −32 mA/+64 mA s Functionally compatible with the 74 series 652 s Latch-up performance exceeds 500 mA s ESD performance:

Human-body model > 2000V Machine model > 200V Charged-device model > 1000V
Ordering Code:

Order Number Package Number

Package Description
74LVTH652WM

M24B
24-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide
74LVTH652MTC

MTC24
24-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbols

IEEE/IEC
2000 Fairchild Semiconductor Corporation DS012018
74LVTH652

Pin Descriptions

Pin Names

CPAB, CPBA SAB, SBA OEAB, OEBA

Description Data Register A Inputs/ 3-STATE Outputs Data Register B Inputs/ 3-STATE Outputs Clock Pulse Inputs Select Inputs Output Enable Inputs

Connection Diagram

Truth Table

Note 1

Inputs OEAB OEBA CPAB CPBA

SAB SBA

Inputs/Outputs

A0 thru A7

B0 thru B7

Operating Mode

L X H L
or L or L
or L or L

X Input

Input

Isolation

Store A and B Data

X Input

Not Specified Store A, Hold B

X Input

Output

Store A in Both Registers

X Not Specified Input

Hold A, Store B

X Output

Input

Store B in Both Registers

L Output

Input

Real-Time B Data to A Bus

H or L X

Store B Data to A Bus

X Input

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Datasheet ID: 74LVTH652WMX 513443