74LVTH162374MTD

74LVTH162374MTD Datasheet

74LVTH162374 Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and Series Resistors in the Outputs

Part	Datasheet
74LVTH162374MTD	74LVTH162374MTD (pdf)

Related Parts	Information
74LVTH162374MEA	74LVTH162374MEA
74LVTH162374MTX	74LVTH162374MTX
74LVTH162374MEX	74LVTH162374MEX

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74LVTH162374 Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and Series Resistors in the Outputs 74LVTH162374 Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and Series Resistors in the Outputs July 2007 • Input and output interface capability to systems at 5V VCC • Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs • Live insertion/extraction permitted • Power Up/Power Down high impedance provides glitch-free bus loading • Outputs include equivalent series resistance of to make external termination resistors unnecessary and reduce overshoot and undershoot • Functionally compatible with the 74 series 16374 • Latch-up performance exceeds 500mA • ESD performance Human-body model > 2000V Machine model > 200V Charged-device model > 1000V • Also packaged in plastic Fine-Pitch Ball Grid Array FBGA Preliminary The LVTH162374 contains sixteen non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock CP and Output Enable OE are common to each byte and can be shorted together for full 16-bit operation. The LVTH162374 is designed with equivalent series resistance in both the HIGH and LOW states of the output. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers/transmitters. The LVTH162374 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. These flip-flops are designed for low-voltage 3.3V VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVTH162374 is fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation. Ordering Information Order Number 74LVTH162374GX 1 74LVTH162374MEA Package Number BGA54A Preliminary MS48A Pb-Free Yes 74LVTH162374MEX MS48A 74LVTH162374MTD MTD48 74LVTH162374MTX MTD48 Notes BGA package available in Tape and Reel only. Package Description Supplied As 54-Ball Fine-Pitch Ball Grid Array FBGA , Tape and Reel JEDEC MO-205, 5.5mm Wide 48-Lead Small Shrink Outline Package SSOP , JEDEC MO-118, Wide Tubes 48-Lead Small Shrink Outline Package SSOP , JEDEC MO-118, Wide Tape and Reel 48-Lead Thin Shrink Small Outline Package Tubes TSSOP , JEDEC MO-153, 6.1mm Wide 48-Lead Thin Shrink Small Outline Package Tape and Reel TSSOP , JEDEC MO-153, 6.1mm Wide 74LVTH162374 Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and Series Resistors in the Outputs Connection Diagrams Pin Assignments for SSOP and TSSOP FBGA Pin Assignments O0 NC OE1 CP1 NC O2 O1 NC O3 VCC O6 O5 GND I5 O8 O7 GND I7 O10 O9 GND I9 O11 VCC O14 O13 NC O15 NC OE2 CP2 NC Logic Symbol Pin Assignment for FPGA Top Thru View Pin Description Pin Name

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74LVTH162374 Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and Series Resistors in the Outputs
74LVTH162374 Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and Series Resistors in the Outputs

July 2007
• Input and output interface capability to systems at 5V VCC
• Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs
• Live insertion/extraction permitted
• Power Up/Power Down high impedance provides
glitch-free bus loading
• Outputs include equivalent series resistance of to
make external termination resistors unnecessary and reduce overshoot and undershoot
• Functionally compatible with the 74 series 16374
• Latch-up performance exceeds 500mA
• ESD performance Human-body model > 2000V Machine model > 200V Charged-device model > 1000V
• Also packaged in plastic Fine-Pitch Ball Grid Array FBGA Preliminary

The LVTH162374 contains sixteen non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock CP and Output Enable OE are common to each byte and can be shorted together for full 16-bit operation.

The LVTH162374 is designed with equivalent series resistance in both the HIGH and LOW states of the output. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers/transmitters.

The LVTH162374 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs.

These flip-flops are designed for low-voltage 3.3V VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVTH162374 is fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation.
Ordering Information

Order Number 74LVTH162374GX 1
74LVTH162374MEA

Package Number

BGA54A Preliminary

MS48A

Pb-Free Yes
74LVTH162374MEX

MS48A
74LVTH162374MTD

MTD48
74LVTH162374MTX

MTD48

Notes BGA package available in Tape and Reel only.

Package Description

Supplied As
54-Ball Fine-Pitch Ball Grid Array FBGA , Tape and Reel JEDEC MO-205, 5.5mm Wide
48-Lead Small Shrink Outline Package SSOP , JEDEC MO-118, Wide

Tubes
48-Lead Small Shrink Outline Package SSOP , JEDEC MO-118, Wide

Tape and Reel
48-Lead Thin Shrink Small Outline Package Tubes TSSOP , JEDEC MO-153, 6.1mm Wide
48-Lead Thin Shrink Small Outline Package Tape and Reel TSSOP , JEDEC MO-153, 6.1mm Wide
74LVTH162374 Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and Series Resistors in the Outputs

Connection Diagrams

Pin Assignments for SSOP and TSSOP

FBGA Pin Assignments

O0 NC OE1 CP1 NC

O2 O1 NC

O3 VCC

O6 O5 GND I5

O8 O7 GND I7

O10 O9 GND I9

O11 VCC

O14 O13 NC

O15 NC OE2 CP2 NC

Logic Symbol

Pin Assignment for FPGA

Top Thru View

Pin Description

Pin Name

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Datasheet ID: 74LVTH162374MTD 513432