74LVTH322245GX

74LVTH322245GX Datasheet

74LVT322245<br>• 74LVTH322245 Low Voltage 32-Bit Transceiver with 3-STATE Outputs and Series Resistors in A Port Outputs

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74LVTH322245GX	74LVTH322245GX (pdf)

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74LVTH322245G	74LVTH322245G

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74LVT322245 • 74LVTH322245 Low Voltage 32-Bit Transceiver with 3-STATE Outputs and Series Resistors in A Port Outputs 74LVT322245 • 74LVTH322245 Low Voltage 32-Bit Transceiver with 3-STATE Outputs and Series Resistors in A Port Outputs The LVT322245 and LVTH322245 contain thirty-two noninverting bidirectional buffers with 3-STATE outputs and are intended for bus oriented applications. The device is byte controlled. Each byte has separate control inputs which can be shorted together for full 32-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state. The LVT322245 and LVTH322245 are designed with equivalent series resistance in both the HIGH and LOW states on the A Port outputs. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers/transmitters. The LVTH322245 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. These non-inverting transceivers are designed for low-voltage 3.3V VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT322245 and LVTH322245 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation. s Input and output interface capability to systems at 5V VCC s Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs 74LVTH322245 s Also available without bushold feature 74LVT322245 s Live insertion/extraction permitted s Power Up/Power Down high impedance provides glitch-free bus loading s A Port outputs include equivalent series resistance of making external termination resistors unnecessary and reducing overshoot and undershoot s A Port outputs source/sink ±12 mA B Port outputs source/sink −32 mA/+64 mA s ESD performance: Human-body model > 2000V Machine model > 200V Charged-device model > 1000V s Packaged in plastic Fine-Pitch Ball Grid Array FBGA Ordering Code: Order Number Package Number Package Description 74LVT322245G Note 1 Note 2 BGA96A 96-Ball Fine-Pitch Ball Grid Array FBGA , JEDEC MO-205, 5.5mm Wide 74LVTH322245G Note 1 Note 2 BGA96A 96-Ball Fine-Pitch Ball Grid Array FBGA , JEDEC MO-205, 5.5mm Wide Note 1 Ordering code “G” indicates TRAYS. Note 2 Devices also available in TAPE and REEL. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol 2002 Fairchild Semiconductor Corporation DS500408 74LVT322245 • 74LVTH322245 Connection Diagram Top Thru View Truth Tables Inputs T/R1 Inputs T/R2 H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Outputs Bus Data to Bus Data to Bus HIGH-Z State on Outputs Bus Data to Bus Data to Bus HIGH-Z State on FBGA Pin Descriptions Pin Names OEn T/Rn Output Enable Input Active LOW Transmit/Receive Input Side A Inputs/3-STATE Outputs Side B Inputs/3-STATE Outputs Pin Assignments for FBGA B0 T/R1 OE1 A0 B2 GND A2 B4 VCC1 A4 B6 GND A6 B8 GND A8 B10 VCC1 A10 B13 B12 GND A12 A13 B15 T/R2 OE2 B16 T/R3 OE3 B19 B18 GND A18 A19 B20 VCC2 A20 B23 B22 GND A22 A23 B25 B24 GND A24 A25 B26 VCC2 A26 B29 B28 GND A28 A29 B31 T/R4 OE4 Inputs T/R3 Inputs T/R4

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74LVT322245
• 74LVTH322245 Low Voltage 32-Bit Transceiver with 3-STATE Outputs and Series Resistors in A Port Outputs
74LVT322245
• 74LVTH322245

Low Voltage 32-Bit Transceiver with 3-STATE Outputs and Series Resistors in A Port Outputs

The LVT322245 and LVTH322245 contain thirty-two noninverting bidirectional buffers with 3-STATE outputs and are intended for bus oriented applications. The device is byte controlled. Each byte has separate control inputs which can be shorted together for full 32-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state.

The LVT322245 and LVTH322245 are designed with equivalent series resistance in both the HIGH and LOW states on the A Port outputs. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers/transmitters.

The LVTH322245 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs.

These non-inverting transceivers are designed for low-voltage 3.3V VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT322245 and LVTH322245 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation.
s Input and output interface capability to systems at 5V VCC
s Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs 74LVTH322245
s Also available without bushold feature 74LVT322245 s Live insertion/extraction permitted s Power Up/Power Down high impedance provides
glitch-free bus loading s A Port outputs include equivalent series resistance of
making external termination resistors unnecessary and reducing overshoot and undershoot s A Port outputs source/sink ±12 mA B Port outputs source/sink −32 mA/+64 mA s ESD performance:

Human-body model > 2000V Machine model > 200V Charged-device model > 1000V s Packaged in plastic Fine-Pitch Ball Grid Array FBGA
Ordering Code:

Order Number Package Number

Package Description
74LVT322245G Note 1 Note 2

BGA96A
96-Ball Fine-Pitch Ball Grid Array FBGA , JEDEC MO-205, 5.5mm Wide
74LVTH322245G Note 1 Note 2

BGA96A
96-Ball Fine-Pitch Ball Grid Array FBGA , JEDEC MO-205, 5.5mm Wide
Note 1 Ordering code “G” indicates TRAYS. Note 2 Devices also available in TAPE and REEL. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol
2002 Fairchild Semiconductor Corporation DS500408
74LVT322245
• 74LVTH322245

Connection Diagram

Top Thru View

Truth Tables

Inputs

T/R1

Inputs

T/R2

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance

Outputs

Bus Data to Bus Data to Bus HIGH-Z State on

Outputs

Bus Data to Bus Data to Bus HIGH-Z State on

FBGA Pin Descriptions

Pin Names

OEn T/Rn

Output Enable Input Active LOW Transmit/Receive Input Side A Inputs/3-STATE Outputs Side B Inputs/3-STATE Outputs

Pin Assignments for FBGA

B0 T/R1 OE1 A0

B2 GND A2

B4 VCC1 A4

B6 GND A6

B8 GND A8

B10 VCC1 A10

B13 B12 GND A12 A13

B15 T/R2 OE2

B16 T/R3 OE3

B19 B18 GND A18 A19

B20 VCC2 A20

B23 B22 GND A22 A23

B25 B24 GND A24 A25

B26 VCC2 A26

B29 B28 GND A28 A29

B31 T/R4 OE4

Inputs

T/R3

Inputs

T/R4

More datasheets: MA3216-800S4 | MA3216-201S4 | MA3216-601M4 | MA3216-121S4 | MA3216-102T4 | MA3216-201T4 | A5350CA-T | A5350CA | 66786-4-7320 | 74LVTH322245G

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Datasheet ID: 74LVTH322245GX 513426