74LVQ245SJ

74LVQ245SJ Datasheet

74LVQ245 Low Voltage Octal Bidirectional Transceiver with 3-STATE Outputs

Part	Datasheet
74LVQ245SJ	74LVQ245SJ (pdf)

Related Parts	Information
74LVQ245SC	74LVQ245SC
74LVQ245QSCX	74LVQ245QSCX
74LVQ245SJX	74LVQ245SJX
74LVQ245QSC	74LVQ245QSC
74LVQ245SCX	74LVQ245SCX

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74LVQ245 Low Voltage Octal Bidirectional Transceiver with 3-STATE Outputs 74LVQ245 Low Voltage Octal Bidirectional Transceiver with 3-STATE Outputs The LVQ245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 12 mA at both the A and B ports. The Transmit/Receive T/R input determines the direction of data flow through the bidirectional transceiver. Transmit active-HIGH enables data from A ports to B ports Receive active-LOW enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition. s Ideal for low power/low noise 3.3V applications s Implements patented EMI reduction circuitry s Available in SOIC JEDEC, SOIC EIAJ and QSOP packages s Guaranteed simultaneous switching noise level and dynamic threshold performance s Improved latch-up immunity s Guaranteed incident wave switching into s 4 kV minimum ESD immunity Ordering Code Order Number Package Number Package Description 74LVQ245SC M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 74LVQ245SJ M20D 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74LVQ245QSC MQA20 20-Lead Quarter Size Outline Package QSOP , JEDEC MO-137, Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Truth Table Inputs Outputs Bus B Data to Bus A Bus A Data to Bus B HIGH-Z State H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial 2001 Fairchild Semiconductor Corporation DS011357 Pin Descriptions Pin Names OE T/R Output Enable Inputs Transmit/Receive Input Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs 74LVQ245 Absolute Maximum Ratings Note 1 Supply Voltage VCC DC Input Diode Current IIK VI = −0.5V VI = VCC + 0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source or Sink Current IO DC VCC or Ground Current ICC or IGND Storage Temperature TSTG DC Latch-Up Source or Sink Current −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V ±50 mA ±400 mA −65°C to +150°C ±300 mA Recommended Operating Conditions Note 2 Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate VIN from 0.8V to 2.0V VCC 3.0V 2.0V to 3.6V 0V to VCC 0V to VCC −40°C to +85°C 125 mV/ns Note 1 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2 Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Parameter Minimum High Level Input Voltage

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74LVQ245 Low Voltage Octal Bidirectional Transceiver with 3-STATE Outputs
74LVQ245 Low Voltage Octal Bidirectional Transceiver with 3-STATE Outputs

The LVQ245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus-oriented applications. Current sinking capability is 12 mA at both the A and B ports. The Transmit/Receive T/R input determines the direction of data flow through the bidirectional transceiver. Transmit active-HIGH enables data from A ports to B ports Receive active-LOW enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a HIGH Z condition.
s Ideal for low power/low noise 3.3V applications s Implements patented EMI reduction circuitry s Available in SOIC JEDEC, SOIC EIAJ and QSOP
packages s Guaranteed simultaneous switching noise level and
dynamic threshold performance s Improved latch-up immunity s Guaranteed incident wave switching into s 4 kV minimum ESD immunity
Ordering Code

Order Number Package Number

Package Description
74LVQ245SC

M20B
20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide
74LVQ245SJ

M20D
20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74LVQ245QSC

MQA20
20-Lead Quarter Size Outline Package QSOP , JEDEC MO-137, Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

Truth Table

Inputs

Outputs

Bus B Data to Bus A

Bus A Data to Bus B

HIGH-Z State

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
2001 Fairchild Semiconductor Corporation DS011357

Pin Descriptions

Pin Names

OE T/R

Output Enable Inputs Transmit/Receive Input Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs
74LVQ245

Absolute Maximum Ratings Note 1

Supply Voltage VCC DC Input Diode Current IIK

VI = −0.5V VI = VCC + 0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source
or Sink Current IO DC VCC or Ground Current

ICC or IGND Storage Temperature TSTG DC Latch-Up Source or

Sink Current
−0.5V to +7.0V
−20 mA +20 mA −0.5V to VCC + 0.5V
−20 mA +20 mA −0.5V to VCC + 0.5V
±50 mA
±400 mA −65°C to +150°C
±300 mA

Recommended Operating Conditions Note 2

Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate

VIN from 0.8V to 2.0V VCC 3.0V
2.0V to 3.6V 0V to VCC 0V to VCC
−40°C to +85°C
125 mV/ns

Note 1 The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.

Note 2 Unused inputs must be held HIGH or LOW. They may not float.

DC Electrical Characteristics

Parameter

Minimum High Level

Input Voltage

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Datasheet ID: 74LVQ245SJ 513412