74F620<br>• 74F623 Inverting Octal Bus Transceiver with 3-STATE Outputs
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74F620 • 74F623 Inverting Octal Bus Transceiver with 3-STATE Outputs 74F620 • 74F623 Inverting Octal Bus Transceiver with 3-STATE Outputs These devices are octal bus transceivers designed for asynchronous two-way data flow between the A and B busses. Both busses are capable of sinking 64 mA and have 3STATE outputs. Dual enable pins GAB, GBA allow data transmission from the A bus to the B bus or from the B bus to the A bus. The 74F620 is an inverting option of the 74F623. s Designed for asynchronous two-way data flow between busses s Outputs sink 64 mA s Dual enable inputs control direction of data flow s Guaranteed 4000V minimum ESD protection s 74F620 is an inverting option of the 74F623 Ordering Code: Order Number Package Number Package Description 74F620PC N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide 74F623SC M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 74F623PC N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram is a registered trademark of Fairchild Semiconductor Corporation 1999 Fairchild Semiconductor Corporation DS009577 74F620 • 74F623 Unit Loading/Fan Out Pin Names GBA, GAB Enable Inputs A Inputs or 3-STATE Outputs B Inputs or 3-STATE Outputs U.L. HIGH/LOW 150/40 150/40 Input IIH/IIL Output IOH/IOL 20 µA/−0.6 mA 70 µA/−0.4 mA −3 mA/64 mA 70 µA/−0.4 mA −3 mA/64 mA Functional Description The enable inputs GAB and GBA control whether data is transmitted from the A bus to the B bus or from the B bus to the A bus. If both GBA and GAB are disabled GBA HIGH and GAB LOW , the outputs are in the high impedance state and data is stored at the A and B busses. When GBA is active LOW, B data is sent to the A bus. When GAB is active HIGH, data from the A bus is sent to the B bus. If both enable inputs are active GBA LOW and GAB HIGH B data is sent to the A bus while A data is sent to the B bus. Logic Diagrams Function Table Enable Inputs Operation GBA GAB 74F620 74F623 L B Data to A Bus B Data to A Bus H A Data to B Bus A Data to B Bus H B Data to A Bus, B Data to A Bus, A Data to B Bus A Data to B Bus H = HIGH Voltage Level L = LOW Voltage Level Z = High Impedance 74F620 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 74F623 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 74F620 • 74F623 Absolute Maximum Ratings Note 1 Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Junction Temperature under Bias −55°C to +150°C |
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