74F540SJX

74F540SJX Datasheet

74F540<br>• 74F541 Octal Buffer/Line Driver with 3-STATE Outputs

Part	Datasheet
74F540SJX	74F540SJX (pdf)

Related Parts	Information
74F541SC	74F541SC
74F541PC	74F541PC
74F540PC	74F540PC
74F540SC	74F540SC
74F541SJX	74F541SJX
74F540SJ	74F540SJ
74F541SJ	74F541SJ
74F541SCX	74F541SCX
74F540SCX	74F540SCX

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74F540 • 74F541 Octal Buffer/Line Driver with 3-STATE Outputs 74F540 • 74F541 Octal Buffer/Line Driver with 3-STATE Outputs The 74F540 and 74F541 are similar in function to the 74F240 and 74F244 respectively, except that the inputs and outputs are on opposite sides of the package see Connection Diagrams . This pinout arrangement makes these devices especially useful as output ports for microprocessors, allowing ease of layout and greater PC board density. s 3-STATE outputs drive bus lines s Inputs and outputs opposite side of package, allowing easier interface to microprocessors Ordering Code: Order Number Package Number Package Description 74F540SC M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 74F540SJ M20D 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74F540PC N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide 74F541SC M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 74F541SJ M20D 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74F541PC N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagrams IEEE/IEC 74F540 74F540 IEEE/IEC 74F541 74F541 2000 Fairchild Semiconductor Corporation DS009553 74F540 • 74F541 Unit Loading/Fan Out Pin Names U.L. HIGH/LOW Input IIH/IIL Output IOH/IOL OE1, OE2 In On, On 3-STATE Output Enable Input Active LOW Inputs Outputs 20 µA/−0.6 mA 20 µA/−0.6 mA 80 −12 mA/64 mA 48 mA Truth Table H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Inputs OE2 L X H L Outputs 74F540 74F541 74F540 • 74F541 Absolute Maximum Ratings Note 1 Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Junction Temperature under Bias −55°C to +150°C VCC Pin Potential to Ground Pin Input Voltage Note 2 −0.5V to +7.0V −0.5V to +7.0V Input Current Note 2 −30 mA to mA Voltage Applied to Output in HIGH State with VCC = 0V Standard Output 3-STATE Output −0.5V to VCC −0.5V to +5.5V Current Applied to Output in LOW State Max

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74F540
• 74F541 Octal Buffer/Line Driver with 3-STATE Outputs
74F540
• 74F541 Octal Buffer/Line Driver with 3-STATE Outputs

The 74F540 and 74F541 are similar in function to the 74F240 and 74F244 respectively, except that the inputs and outputs are on opposite sides of the package see Connection Diagrams . This pinout arrangement makes these devices especially useful as output ports for microprocessors, allowing ease of layout and greater PC board density.
s 3-STATE outputs drive bus lines s Inputs and outputs opposite side of package, allowing
easier interface to microprocessors
Ordering Code:

Order Number Package Number

Package Description
74F540SC

M20B
20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide
74F540SJ

M20D
20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74F540PC

N20A
20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
74F541SC

M20B
20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide
74F541SJ

M20D
20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74F541PC

N20A
20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagrams

IEEE/IEC 74F540
74F540

IEEE/IEC 74F541
74F541
2000 Fairchild Semiconductor Corporation DS009553
74F540
• 74F541

Unit Loading/Fan Out

Pin Names

U.L. HIGH/LOW

Input IIH/IIL Output IOH/IOL

OE1, OE2 In On, On
3-STATE Output Enable Input Active LOW Inputs Outputs
20 µA/−0.6 mA
20 µA/−0.6 mA
80 −12 mA/64 mA 48 mA

Truth Table

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance

Inputs OE2 L X H L

Outputs
74F540
74F541
74F540
• 74F541

Absolute Maximum Ratings Note 1

Storage Temperature
−65°C to +150°C

Ambient Temperature under Bias
−55°C to +125°C

Junction Temperature under Bias
−55°C to +150°C

VCC Pin Potential to Ground Pin Input Voltage Note 2
−0.5V to +7.0V −0.5V to +7.0V

Input Current Note 2
−30 mA to mA

Voltage Applied to Output
in HIGH State with VCC = 0V Standard Output 3-STATE Output
−0.5V to VCC −0.5V to +5.5V

Current Applied to Output
in LOW State Max

More datasheets: CDBMH240-HF | CDBMH260-HF | CDBMH230-HF | 3294-15SURC/S530-A4 | 18804 | FDW252P | 74F541SC | 74F541PC | 74F540PC | 74F540SC

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Datasheet ID: 74F540SJX 513345