74F244PC
74F244PC Datasheet
74F240<br>• 74F241<br>• 74F244 Octal Buffers/Line Drivers with 3-STATE Outputs
| Part | Datasheet |
|---|---|
74F244PC |
74F244PC (pdf) |
| Related Parts | Information |
|---|---|
|
74F244SCX |
74F244SCX |
|
74F240SC |
74F240SC |
|
74F241PC |
74F241PC |
|
74F240PC |
74F240PC |
|
74F244SC |
74F244SC |
74F244SJX |
74F244SJX |
|
74F244MSA |
74F244MSA |
|
74F244MSAX |
74F244MSAX |
74F240SJ |
74F240SJ |
74F240SJX |
74F240SJX |
74F244SJ |
74F244SJ |
|
74F240SCX |
74F240SCX |
| PDF Datasheet Preview |
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| 74F240 • 74F241 • 74F244 Octal Buffers/Line Drivers with 3-STATE Outputs 74F240 • 74F241 • 74F244 Octal Buffers/Line Drivers with 3-STATE Outputs The 74F240, 74F241 and 74F244 are octal buffers and line drivers designed to be employed as memory and address drivers, clock drivers and bus-oriented transmitters/receivers which provide improved PC and board density. s 3-STATE outputs drive bus lines or buffer memory address registers s Outputs sink 64 mA 48 mA mil s 12 mA source current s Input clamp diodes limit high-speed termination effects Ordering Code: Order Code Package Number Package Description 74F240SC Note 1 M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 74F240SJ Note 1 M20D 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74F240PC N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide 74F241SC M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 74F241PC N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide 74F244SC Note 1 M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 74F244SJ Note 1 M20D 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74F244MSA Note 1 MSA20 20-Lead Shrink Small Outline Package SSOP , JEDEC MO-150, 5.3mm Wide 74F244PC N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Note 1 Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams 74F240 74F241 74F244 2004 Fairchild Semiconductor Corporation DS009501 74F240 • 74F241 • 74F244 Logic Symbols IEEE/IEC 74F240 IEEE/IEC 74F241 IEEE/IEC 74F244 Unit Loading/Fan Out Pin Names U.L. HIGH/LOW Input IIH/IIL Output IOH/IOL OE1, OE2 3-STATE Output Enable Input Active LOW 20 µA/−1 mA 3-STATE Output Enable Input Active HIGH 20 µA/−1 mA Inputs 74F240 Note 2 20 µA/−1 mA Inputs 74F241, 74F244 Note 2 20 µA/−1.6 mA Outputs 80 −12 mA/64 mA 48 mA Note 2 Worst-case 74F240 enabled 74F241, 74F244 disabled Truth Tables 74F240 74F244 OE1 H D1n X 74F241 D2n X O2n Z H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance 74F240 • 74F241 • 74F244 Absolute Maximum Ratings Note 3 Storage Temperature −65°C to +150°C |
| More datasheets: T6819-TBQY | T6819-TBSY | T6819-TBQ | T6819-TBS | CS3012-ISZ | CS3011-ISZ | CS3012-ISZR | CS3011-ISZR | 74F244SCX | 74F240SC |
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