74F219PC

74F219PC Datasheet

74F219 64-Bit Random Access Memory with 3-STATE Outputs

Part	Datasheet
74F219PC	74F219PC (pdf)

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74F219 64-Bit Random Access Memory with 3-STATE Outputs 74F219 64-Bit Random Access Memory with 3-STATE Outputs The 74F219 is a high-speed 64-bit RAM organized as a 16word by 4-bit array. Address inputs are buffered to minimize loading and are fully decoded on-chip. The outputs are 3-STATE and are in the high-impedance state whenever the Chip Select CS input is HIGH. The outputs are active only in the Read mode. This device is similar to the 74F189 but features non-inverting, rather than inverting, data outputs. s 3-STATE outputs for data bus applications s Buffered inputs minimize loading s Address decoding on-chip s Diode clamped inputs minimize ringing s Available in SOIC 300 mil only Ordering Code: Order Number 74F219SC 74F219PC Package Number Package Description M16B 16-Lead Small Outline Intergrated Circuit SOIC , JEDEC MS-013, Wide N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Logic Symbol Connection Diagram 2004 Fairchild Semiconductor Corporation DS009500 74F219 Unit Loading/Fan Out Pin Names CS WE Address Inputs Chip Select Input Active LOW Write Enable Input Active LOW Data Inputs 3-STATE Data Outputs U.L. HIGH/LOW 150/40 Input IIH/IIL Output IOH/IOL 20 µA/−0.6 mA 20 µA/−1.2 mA 20 µA/−0.6 mA 20 µA/−0.6 mA −3 mA/24 mA 20 mA Function Table Inputs H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial WE L H X Operation Write Read Inhibit Condition of Outputs High Impedance True Stored Data High Impedance Block Diagram 74F219 Absolute Maximum Ratings Note 1 Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Junction Temperature under Bias −55°C to +150°C VCC Pin Potential to Ground Pin Input Voltage Note 2 −0.5V to +7.0V −0.5V to +7.0V Input Current Note 2 −30 mA to mA Voltage Applied to Output

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74F219 64-Bit Random Access Memory with 3-STATE Outputs
74F219 64-Bit Random Access Memory with 3-STATE Outputs

The 74F219 is a high-speed 64-bit RAM organized as a 16word by 4-bit array. Address inputs are buffered to minimize loading and are fully decoded on-chip. The outputs are 3-STATE and are in the high-impedance state whenever the Chip Select CS input is HIGH. The outputs are active only in the Read mode. This device is similar to the 74F189 but features non-inverting, rather than inverting, data outputs.
s 3-STATE outputs for data bus applications s Buffered inputs minimize loading s Address decoding on-chip s Diode clamped inputs minimize ringing s Available in SOIC 300 mil only
Ordering Code:

Order Number 74F219SC 74F219PC

Package Number

Package Description

M16B
16-Lead Small Outline Intergrated Circuit SOIC , JEDEC MS-013, Wide

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide

Logic Symbol

Connection Diagram
2004 Fairchild Semiconductor Corporation DS009500
74F219

Unit Loading/Fan Out

Pin Names

CS WE

Address Inputs Chip Select Input Active LOW Write Enable Input Active LOW Data Inputs 3-STATE Data Outputs

U.L. HIGH/LOW
150/40

Input IIH/IIL Output IOH/IOL 20 µA/−0.6 mA 20 µA/−1.2 mA 20 µA/−0.6 mA 20 µA/−0.6 mA −3 mA/24 mA 20 mA

Function Table

Inputs

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial

WE L H X

Operation

Write Read Inhibit

Condition of Outputs

High Impedance True Stored Data High Impedance

Block Diagram
74F219

Absolute Maximum Ratings Note 1

Storage Temperature
−65°C to +150°C

Ambient Temperature under Bias
−55°C to +125°C

Junction Temperature under Bias
−55°C to +150°C

VCC Pin Potential to Ground Pin Input Voltage Note 2
−0.5V to +7.0V −0.5V to +7.0V

Input Current Note 2
−30 mA to mA

Voltage Applied to Output

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Datasheet ID: 74F219PC 513300