74F157APC

74F157APC Datasheet

74F157A Quad 2-Input Multiplexer

Part	Datasheet
74F157APC	74F157APC (pdf)

Related Parts	Information
74F157ASC	74F157ASC
74F157ASJX	74F157ASJX
74F157ASJ	74F157ASJ
74F157ASCX	74F157ASCX

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74F157A Quad 2-Input Multiplexer 74F157A Quad 2-Input Multiplexer The F157A is a high-speed quad 2-input multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four outputs present the selected data in the true non-inverted form. The F157A can also be used to generate any four of the 16 different functions to two variables. Ordering Code: Order Number Package Number Package Description 74F157ASC M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow 74F157ASJ M16D 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74F157APC N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC 2000 Fairchild Semiconductor Corporation DS009483 74F157A Unit Loading/Fan Out Pin Names Source 0 Data Inputs Source 1 Data Inputs Enable Input Active LOW Select Input Outputs U.L. HIGH/LOW Input IIH/IIL Output IOH/IOL 20 µA/−0.6 mA 20 µA/−0.6 mA 20 µA/−0.6 mA 20 µA/−0.6 mA −1 mA/20 mA Truth Table Inputs H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Functional Description Output The F157A is a quad 2-input multiplexer. It selects four bits of data from two sources under the control of a common Select input S . The Enable input E is active LOW. When E is HIGH, all of the outputs Z are forced LOW regardless of all other inputs. The F157A is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below: Zn = E • I1nS + I0n S A common use of the F157A is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select input. A less obvious use is as a function generator. The F157A can generate any four of the 16 different functions of two variables with one variable common. This is useful for implementing highly irregular logic. Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 74F157A Absolute Maximum Ratings Note 1 Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Junction Temperature under Bias −55°C to +150°C

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74F157A Quad 2-Input Multiplexer
74F157A

Quad 2-Input Multiplexer

The F157A is a high-speed quad 2-input multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four outputs present the selected data in the true non-inverted form. The F157A can also be used to generate any four of the 16 different functions to two variables.
Ordering Code:

Order Number Package Number

Package Description
74F157ASC

M16A
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow
74F157ASJ

M16D
16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74F157APC

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC
2000 Fairchild Semiconductor Corporation DS009483
74F157A

Unit Loading/Fan Out

Pin Names

Source 0 Data Inputs Source 1 Data Inputs Enable Input Active LOW Select Input Outputs

U.L. HIGH/LOW

Input IIH/IIL Output IOH/IOL 20 µA/−0.6 mA 20 µA/−0.6 mA 20 µA/−0.6 mA 20 µA/−0.6 mA −1 mA/20 mA

Truth Table

Inputs

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial

Functional Description

Output

The F157A is a quad 2-input multiplexer. It selects four bits of data from two sources under the control of a common

Select input S . The Enable input E is active LOW. When E is HIGH, all of the outputs Z are forced LOW regardless
of all other inputs. The F157A is the logic implementation of
a 4-pole, 2-position switch where the position of the switch
is determined by the logic levels supplied to the Select
input. The logic equations for the outputs are shown below:

Zn = E
• I1nS + I0n S

A common use of the F157A is the moving of data from two
groups of registers to four common output busses. The
particular register from which the data comes is determined
by the state of the Select input. A less obvious use is as a
function generator. The F157A can generate any four of
the 16 different functions of two variables with one variable
common. This is useful for implementing highly irregular
logic.

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
74F157A

Absolute Maximum Ratings Note 1

Storage Temperature
−65°C to +150°C

Ambient Temperature under Bias
−55°C to +125°C

Junction Temperature under Bias
−55°C to +150°C

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Datasheet ID: 74F157APC 513280