74F153SCX

74F153SCX Datasheet


74F153 Dual 4-Input Multiplexer

Part Datasheet
74F153SCX 74F153SCX 74F153SCX (pdf)
Related Parts Information
74F153PC 74F153PC 74F153PC
74F153SJX 74F153SJX 74F153SJX
74F153SJ 74F153SJ 74F153SJ
74F153SC 74F153SC 74F153SC
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74F153 Dual 4-Input Multiplexer
74F153

Dual 4-Input Multiplexer

The F153 is a high-speed dual 4-input multiplexer with common select inputs and individual enable inputs for each section. It can select two lines of data from four sources. The two buffered outputs present data in the true non-inverted form. In addition to multiplexer operation, the F153 can generate any two functions of three variables.
Ordering Code:

Order Number Package Number

Package Description
74F153SC

M16A
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow
74F153SJ

M16D
16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74F153PC

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC
2000 Fairchild Semiconductor Corporation DS009482
74F153

Unit Loading/Fan Out

Pin Names

S0, S1 Ea Eb Za Zb

Side A Data Inputs Side B Data Inputs Common Select Inputs Side A Enable Input Active LOW Side B Enable Input Active LOW Side A Output Side B Output

U.L. HIGH/LOW

Input IIH/IIL Output IOH/IOL 20 µA/−0.6 mA 20 µA/−0.6 mA 20 µA/−0.6 mA 20 µA/−0.6 mA 20 µA/−0.6 mA −1 mA/20 mA −1 mA/20 mA

Truth Table

Select Inputs

Inputs a or b

Output

S1 E I0 I1 I2 I3

X HXXXX

L LXXX

L LHXXX H

LXLXX

L LXHXX H

H LXXLX

H LXXHX H

H LXXXL

H LXXXH H

H = HIGH Voltage Level L = LOW X = Immaterial

Functional Description

The F153 is a dual 4-input multiplexer. It can select two bits of data from up to four sources under the control of the common Select inputs S0, S1 . The two 4-input multiplexer circuits have individual active LOW Enables Ea, Eb which can be used to strobe the outputs independently. When the Enables Ea, Eb are HIGH, the corresponding outputs Za, Zb are forced LOW. The F153 is the logic implementation of a 2-pole, 4-position switch, where the position of the switch is determined by the logic levels supplied to the two Select inputs. The logic equations for the outputs are as follows:

Za = Ea• I0a•S1•S0 + I1a•S1•S0 + I2a•S1•S0 + I3a•S1•S0

Zb = Eb• I0b•S1•S0 + I1b•S1•S0 + I2b•S1•S0 + I3b•S1•S0

The F153 can be used to move data from a group of registers to a common output bus. The particular register from which the data came would be determined by the state of the Select inputs. A less obvious application is as a function generator. The F153 can generate two functions of three variables. This is useful for implementing highly irregular random logic.

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
74F153

Absolute Maximum Ratings Note 1

Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage Note 2 Input Current Note 2 Voltage Applied to Output
in HIGH State with VCC = 0V Standard Output 3-STATE Output Current Applied to Output in LOW State Max
−65°C to +150°C −55°C to +125°C −55°C to +150°C
−0.5V to +7.0V −0.5V to +7.0V −30 mA to mA
−0.5V to VCC −0.5V to +5.5V
More datasheets: LFR-215WW230VAC | LFR-215CW125VAC | LFR-215CW230VAC | LFR-215G230VAC | LFR-215G125VAC | LFR-215Y230VAC | LFR-215WW130VAC | 74F153PC | 74F153SJX | 74F153SJ


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Datasheet ID: 74F153SCX 513279