74F139SC
74F139SC Datasheet
74F139 Dual 1-of-4 Decoder/Demultiplexer
| Part | Datasheet |
|---|---|
74F139SC |
74F139SC (pdf) |
| Related Parts | Information |
|---|---|
74F139PC |
74F139PC |
74F139SJ |
74F139SJ |
74F139SJX |
74F139SJX |
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74F139SCX |
74F139SCX |
| PDF Datasheet Preview |
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| 74F139 Dual 1-of-4 Decoder/Demultiplexer 74F139 Dual 1-of-4 Decoder/Demultiplexer The F139 is a high-speed, dual 1-of-4 decoder/demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually exclusive active LOW outputs. Each decoder has an active LOW Enable input which can be used as a data input for a 4-output demultiplexer. Each half of the F139 can be used as a function generator providing all four minterms of two variables. s Multifunction capability s Two completely independent 1-of-4 decoders s Active LOW mutually exclusive outputs Ordering Code: Order Number Package Number Package Description 74F139SC M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow 74F139SJ M16D 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74F139PC N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Truth Table Inputs Outputs H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial 2000 Fairchild Semiconductor Corporation DS009479 74F139 Unit Loading/Fan Out Pin Names U.L. Input IIH/IIL HIGH/LOW Output IOH/IOL A0, A1 E Address Inputs Enable Inputs Active LOW 20 µA/−0.6 mA 20 µA/−0.6 mA Outputs Active LOW −1 mA/20 mA Functional Description The F139 is a high-speed dual 1-of-4 decoder/demultiplexer. The device has two independent decoders, each of which accepts two binary weighted inputs and provides four mutually exclusive active LOW Outputs Each decoder has an active LOW enable E . When E is HIGH all outputs are forced HIGH. The enable can be used as the data input for a 4-output demultiplexer application. Each half of the F139 generates all four minterms of two variables. These four minterms are useful in some applications, replacing multiple gate functions as shown in Figure 1, and thereby reducing the number of packages required in a logic network. Logic Diagram FIGURE Gate Functions each half Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 74F139 Absolute Maximum Ratings Note 1 Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage Note 2 Input Current Note 2 Voltage Applied to Output in HIGH State with VCC = 0V Standard Output 3 STATE Output Current Applied to Output in LOW State Max ESD Last Passing Voltage Min −65°C to +150°C −55°C to +125°C −55°C to +150°C −0.5V to +7.0V −0.5V to +7.0V −30 mA to mA −0.5V to VCC −0.5V to +5.5V twice the rated IOL mA 4000V Recommended Operating Conditions Free Air Ambient Temperature Supply Voltage 0°C to +70°C +4.5V to +5.5V Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2 Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol VIH VIL VCD VOH VOL IIH IBVI ICEX VID |
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