74F125PC

74F125PC Datasheet

74F125 Quad Buffer 3-STATE

Part	Datasheet
74F125PC	74F125PC (pdf)

Related Parts	Information
74F125SCX	74F125SCX
74F125SC	74F125SC
74F125SJ	74F125SJ
74F125SJX	74F125SJX

PDF Datasheet Preview
74F125 Quad Buffer 3-STATE 74F125 Quad Buffer 3-STATE s High impedance base inputs for reduced loading Ordering Code: Order Number Package Number Package Description 74F125SC M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, Narrow 74F125SJ M14D 14-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74F125PC N14A 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Unit Loading/Fan Out Pin Names Function Table An, Bn On H = HIGH Voltage Level L = LOW Voltage Level Z = High Impedance X = Immaterial Inputs Outputs U.L. HIGH/LOW Input IIH/IIL Output IOH/IOL 20 µA/−20 µA 80 −12 mA/64 mA 48 mA Inputs Output O L H Z 2000 Fairchild Semiconductor Corporation DS009475 74F125 Absolute Maximum Ratings Note 1 Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Junction Temperature under Bias −55°C to +150°C VCC Pin Potential to Ground Pin Input Voltage Note 2 −0.5V to +7.0V −0.5V to +7.0V Input Current Note 2 −30 mA to mA Voltage Applied to Output in HIGH State with VCC = 0V Standard Output 3-STATE Output −0.5V to VCC −0.5V to +5.5V Current Applied to Output in LOW State Max twice the rated IOL mA Recommended Operating Conditions Free Air Ambient Temperature Supply Voltage 0°C to +70°C +4.5V to +5.5V Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2 Either voltage limit or current limit is sufficient to protect inputs.

PDF Datasheet Preview

74F125 Quad Buffer 3-STATE
74F125 Quad Buffer 3-STATE
s High impedance base inputs for reduced loading
Ordering Code:

Order Number Package Number

Package Description
74F125SC

M14A
14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, Narrow
74F125SJ

M14D
14-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74F125PC

N14A
14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

IEEE/IEC

Unit Loading/Fan Out

Pin Names

Function Table

An, Bn On

H = HIGH Voltage Level L = LOW Voltage Level Z = High Impedance X = Immaterial

Inputs Outputs

U.L. HIGH/LOW

Input IIH/IIL Output IOH/IOL
20 µA/−20 µA
80 −12 mA/64 mA 48 mA

Inputs

Output

O L H Z
2000 Fairchild Semiconductor Corporation DS009475
74F125

Absolute Maximum Ratings Note 1

Storage Temperature
−65°C to +150°C

Ambient Temperature under Bias
−55°C to +125°C

Junction Temperature under Bias
−55°C to +150°C

VCC Pin Potential to Ground Pin Input Voltage Note 2
−0.5V to +7.0V −0.5V to +7.0V

Input Current Note 2
−30 mA to mA

Voltage Applied to Output
in HIGH State with VCC = 0V Standard Output 3-STATE Output
−0.5V to VCC −0.5V to +5.5V

Current Applied to Output
in LOW State Max
twice the rated IOL mA

Recommended Operating Conditions

Free Air Ambient Temperature Supply Voltage
0°C to +70°C +4.5V to +5.5V

Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.

Note 2 Either voltage limit or current limit is sufficient to protect inputs.

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Datasheet ID: 74F125PC 513271