74ACTQ18825SSCX

74ACTQ18825SSCX Datasheet


74ACTQ18825 18-Bit Buffer/Line Driver with 3-STATE Outputs

Part Datasheet
74ACTQ18825SSCX 74ACTQ18825SSCX 74ACTQ18825SSCX (pdf)
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74ACTQ18825SSC 74ACTQ18825SSC 74ACTQ18825SSC
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74ACTQ18825 18-Bit Buffer/Line Driver with 3-STATE Outputs
74ACTQ18825 18-Bit Buffer/Line Driver with 3-STATE Outputs

The ACTQ18825 contains eighteen non-inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is byte controlled. Each byte has separate 3-STATE control inputs which can be shorted together for full 18-bit operation.

The ACTQ18825 utilizes Fairchild FACT Quiet Series technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series features GTO output control and undershoot corrector for superior performance.
s Utilizes Fairchild FACT Quiet Series technology s Broadside pinout allows for easy board layout s Guaranteed simultaneous switching noise level and
dynamic threshold performance s Guaranteed pin-to-pin output skew s Separate control logic for each byte s Extra data width for wider address/data paths or buses
carrying parity s Outputs source/sink 24 mA s Additional specs for Multiple Output Switching s Output loading specs for both 50 pF and 250 pF loads
Ordering Code:

Order Number Package Number

Package Description
74ACTQ18825SSC

MS56A
56-Lead Shrink Small Outline Package SSOP , JEDEC MO-118, Wide
74ACTQ18825MTD

MTD56
56-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

Pin Descriptions

Pin Names

Description Output Enable Input Active LOW Inputs Outputs

FACT , FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation.
2000 Fairchild Semiconductor Corporation DS010955
74ACTQ18825

Connection Diagram Logic Diagram

Functional Description

The ACTQ18825 contains eighteen non-inverting buffers with 3-STATE standard outputs. The device is byte controlled with each byte functioning identically, but independently of the other. The control pins may be shorted together to obtain full 18-bit operation. The 3-STATE outputs are controlled by an Output Enable OEn input for each byte. When OEn is LOW, the outputs are in 2-state mode. When OEn is HIGH, the outputs are in the high impedance mode, but this does not interfere with entering new data into the inputs.

Truth Table

Inputs

Outputs

Byte 1 0:8 Byte 2 8:17 OE1 OE2 OE3 OE4

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = HIGH Impedance
74ACTQ18825

Absolute Maximum Ratings Note 1

Supply Voltage VCC DC Input Diode Current IIK

VI = −0.5V VI = VCC +0.5V DC Output Diode Current IOK VO = −0.5V VO = VCC +0.5V DC Output Voltage VO DC Output Source/Sink Current IO DC VCC or Ground Current Per Output Pin

Storage Temperature

ESD Last Passing Voltage Min
−0.5V to +7.0V
−20 mA +20 mA
−20 mA +20 mA −0.5V to VCC + 0.5V ±50 mA
±50 mA −65°C to +150°C
4000V

Recommended Operating Conditions

Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate
4.5V to 5.5V
0V to VCC 0V to VCC −40°C to +85°C 125 mV/ns

VIN from 0.8V to 2.0V

VCC 4.5V, 5.5V

Note 1 Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications.

DC Electrical Characteristics

Parameter

TA = +25°C

TA = −40°C to +85°C Units

Guaranteed Limits

Conditions

Minimum HIGH
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Datasheet ID: 74ACTQ18825SSCX 513206